ACPL-C790-500E

{
  "schema_version": 1,
  "type": "component",
  "slug": "acpl-c790-500e",
  "title": "ACPL-C790-500E",
  "brief": "Broadcom AVAGO Operational Amplifier, SO-8-6.8mm. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "op-amp-cmp",
    "acpl-c790-500e"
  ],
  "component": {
    "mpn": "ACPL-C790-500E",
    "manufacturer": "Broadcom AVAGO",
    "package": "SO-8-6.8mm",
    "pin_count": 8,
    "category": "Op-amp/Cmp",
    "subcategory": "Operational Amplifier",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/2dd5cde0e04c446abf74c5b17a8139b2.pdf",
    "parts": {
      "symbol": "acpl-c790-500e.kicad_sym",
      "footprint": "acpl-c790-500e.kicad_mod",
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      "model_3d_step": "acpl-c790-500e-etched.step",
      "model_3d_step_plain": "acpl-c790-500e.step",
      "lbr": "acpl-c790-500e.lbr"
    },
    "distributor_links": {
      "lcsc": "C81946"
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD1",
        "type": "power_in",
        "description": "Input-side supply voltage, 4.5 V to 5.5 V referenced to GND1. Requires a 0.1 µF bypass capacitor between pins 1 and 4. Typical input-side supply current IDD1 = 11 mA (18.5 mA max)."
      },
      {
        "number": "2",
        "name": "VIN+",
        "type": "input",
        "description": "Positive analog input. Nominal input range ±200 mV (full-scale ±300 mV, functional ±2 V) relative to VIN-. Input bias current typ. -0.1 µA; single-ended input impedance 27 kΩ."
      },
      {
        "number": "3",
        "name": "VIN-",
        "type": "input",
        "description": "Negative analog input, normally connected to GND1 for single-ended sensing. Same ±200 mV nominal range and 27 kΩ single-ended input impedance as VIN+."
      },
      {
        "number": "4",
        "name": "GND1",
        "type": "power_in",
        "description": "Input-side ground reference for VDD1, VIN+ and VIN-."
      },
      {
        "number": "5",
        "name": "GND2",
        "type": "power_in",
        "description": "Output-side ground reference for VDD2, VOUT+ and VOUT-. Galvanically isolated from GND1 by the optical barrier (VIORM = 1414 Vpeak, 5000 Vrms/1 min)."
      },
      {
        "number": "6",
        "name": "VOUT-",
        "type": "output",
        "description": "Negative differential analog output. Output common-mode voltage 1.23 V, output voltage range 0 V to 2.5 V, output resistance ~21 Ω, short-circuit current ~11 mA."
      },
      {
        "number": "7",
        "name": "VOUT+",
        "type": "output",
        "description": "Positive differential analog output. Output common-mode voltage 1.23 V, output voltage range 0 V to 2.5 V, output resistance ~21 Ω, short-circuit current ~11 mA."
      },
      {
        "number": "8",
        "name": "VDD2",
        "type": "power_in",
        "description": "Output-side supply voltage, 3 V to 5.5 V referenced to GND2. Requires a 0.1 µF bypass capacitor between pins 5 and 8. Typical IDD2 = 7 mA at 5 V (6.8 mA at 3.3 V)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/2dd5cde0e04c446abf74c5b17a8139b2.pdf",
        "pages": 14,
        "sha256": "c0ffd6a7460a5a47",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
      "mark": "drawn"
    },
    "models_3d": [
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        "file": "acpl-c790-500e.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "acpl-c790-500e-etched.step",
        "role": "eda",
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
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        "footprint_binding": "identity",
        "sha256": "ce25b422d068721ee8abbd63cd302963df1f4c7ac345f57f37f08d7ae34f082f",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Broadcom AVAGO",
      "Package": "SO-8-6.8mm",
      "Category": "Op-amp/Cmp",
      "Pins": "8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "acpl-c790-500e"
  ],
  "discovery_pitch": "ACPL-C790-500E (Broadcom AVAGO) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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  "files": [
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    "acpl-c790-500e.lbr",
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  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:29:05.488Z"
}