A3979SLPTR-T

{
  "slug": "a3979slptr-t",
  "version": "0.1.0",
  "type": "component",
  "description": "Allegro MicroSystems, LLC Motor Driver ICs, HTSSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management ics",
    "a3979slptr-t",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "a3979slptr-t.kicad_sym",
    "a3979slptr-t.kicad_mod",
    "a3979slptr-t.glb",
    "a3979slptr-t.step",
    "a3979slptr-t.lbr",
    "docs/hero.png",
    "docs/a3979slptr-t-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "a3979slptr-t-hero.glb",
    "a3979slptr-t-hero.overlay.json",
    "a3979slptr-t-etched.glb"
  ],
  "component": {
    "mpn": "A3979SLPTR-T",
    "manufacturer": "Allegro MicroSystems, LLC",
    "package": "HTSSOP-28",
    "pin_count": 29,
    "category": "Power Management ICs",
    "subcategory": "Motor Driver ICs",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/3ea0f925983a4df8835c70649fa2881f.pdf",
    "parts": {
      "symbol": "a3979slptr-t.kicad_sym",
      "footprint": "a3979slptr-t.kicad_mod",
      "model_3d": "a3979slptr-t-hero.glb",
      "model_3d_plain": "a3979slptr-t-etched.glb",
      "model_3d_step": "a3979slptr-t-etched.step",
      "model_3d_step_plain": "a3979slptr-t.step",
      "lbr": "a3979slptr-t.lbr"
    },
    "distributor_links": {
      "lcsc": "C34468"
    },
    "distributor_check": {
      "checked_at": "2026-10-22T21:46:58Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "SENSE1",
        "type": "passive",
        "description": "Sense resistor connection for Bridge 1; voltage on this pin must not exceed the 0.5 V maximum rating."
      },
      {
        "number": "2",
        "name": "HOME",
        "type": "output",
        "description": "Logic output indicating the translator is at its initial Home state; goes low on RESET (VHOME(1) ≥ 0.7×VDD at -200 µA, VHOME(0) ≤ 0.3×VDD at 200 µA)."
      },
      {
        "number": "3",
        "name": "DIR",
        "type": "input",
        "description": "Logic input setting the motor rotation direction; changes take effect on the next rising edge of STEP."
      },
      {
        "number": "4",
        "name": "OUT1A",
        "type": "output",
        "description": "DMOS full-bridge output A for Bridge 1, rated up to 35 V and ±2.5 A."
      },
      {
        "number": "5",
        "name": "PFD",
        "type": "input",
        "description": "Percent fast decay input: above 0.6×VDD selects Slow decay, below 0.21×VDD selects Fast decay, in between selects Mixed decay; decouple with 0.1 µF."
      },
      {
        "number": "6",
        "name": "RC1",
        "type": "passive",
        "description": "Analog RT/CT timing connection to ground setting the fixed off-time (tOFF = RT×CT) and blanking time (tBLANK = 1400×CT) for Bridge 1."
      },
      {
        "number": "7",
        "name": "AGND",
        "type": "power_in",
        "description": "Analog ground; must be connected externally to PGND."
      },
      {
        "number": "8",
        "name": "REF",
        "type": "input",
        "description": "Current trip reference voltage input (0 to VDD); ITRIPmax = VREF/8RS, and VREF should not exceed 4 V in other than full-step modes."
      },
      {
        "number": "9",
        "name": "RC2",
        "type": "passive",
        "description": "Analog RT/CT timing connection to ground setting the fixed off-time (tOFF = RT×CT) and blanking time (tBLANK = 1400×CT) for Bridge 2."
      },
      {
        "number": "10",
        "name": "VDD",
        "type": "power_in",
        "description": "Logic supply, 3.0 to 5.5 V operating range (7.0 V absolute maximum)."
      },
      {
        "number": "11",
        "name": "OUT2A",
        "type": "output",
        "description": "DMOS full-bridge output A for Bridge 2, rated up to 35 V and ±2.5 A."
      },
      {
        "number": "12",
        "name": "MS2",
        "type": "input",
        "description": "Logic input that together with MS1 selects the microstep resolution (full, half, quarter, sixteenth); changes take effect on the next rising STEP edge."
      },
      {
        "number": "13",
        "name": "MS1",
        "type": "input",
        "description": "Logic input that together with MS2 selects the microstep resolution (full, half, quarter, sixteenth); changes take effect on the next rising STEP edge."
      },
      {
        "number": "14",
        "name": "SENSE2",
        "type": "passive",
        "description": "Sense resistor connection for Bridge 2; voltage on this pin must not exceed the 0.5 V maximum rating."
      },
      {
        "number": "15",
        "name": "VBB2",
        "type": "power_in",
        "description": "Load supply for Bridge 2, 8 to 35 V operating; decouple with an electrolytic capacitor (>47 µF recommended) close to the device."
      },
      {
        "number": "16",
        "name": "SR",
        "type": "input",
        "description": "Logic input selecting synchronous rectification: low enables Active mode, high disables it."
      },
      {
        "number": "17",
        "name": "RESET",
        "type": "input",
        "description": "Active-low logic input that sets the translator to the Home state and turns off all DMOS outputs; STEP inputs are ignored until it is high."
      },
      {
        "number": "18",
        "name": "OUT2B",
        "type": "output",
        "description": "DMOS full-bridge output B for Bridge 2, rated up to 35 V and ±2.5 A."
      },
      {
        "number": "19",
        "name": "STEP",
        "type": "input",
        "description": "Logic input where a low-to-high transition advances the motor one microstep (minimum pulse width 1 µs)."
      },
      {
        "number": "20",
        "name": "VREG",
        "type": "passive",
        "description": "Internally generated regulator voltage for the sink-side DMOS outputs; must be decoupled with a 0.22 µF capacitor to ground."
      },
      {
        "number": "21",
        "name": "PGND",
        "type": "power_in",
        "description": "Power ground; must be connected externally to AGND."
      },
      {
        "number": "22",
        "name": "VCP",
        "type": "passive",
        "description": "Charge pump reservoir capacitor connection; a 0.22 µF ceramic capacitor is required between VCP and VBB."
      },
      {
        "number": "23",
        "name": "CP1",
        "type": "passive",
        "description": "Charge pump capacitor terminal 1; connect a 0.22 µF ceramic capacitor between CP1 and CP2."
      },
      {
        "number": "24",
        "name": "CP2",
        "type": "passive",
        "description": "Charge pump capacitor terminal 2; connect a 0.22 µF ceramic capacitor between CP1 and CP2."
      },
      {
        "number": "25",
        "name": "OUT1B",
        "type": "output",
        "description": "DMOS full-bridge output B for Bridge 1, rated up to 35 V and ±2.5 A."
      },
      {
        "number": "26",
        "name": "ENABLE",
        "type": "input",
        "description": "Active-low logic input that enables the DMOS outputs; logic high disables the outputs while translator inputs remain active."
      },
      {
        "number": "27",
        "name": "SLEEP",
        "type": "input",
        "description": "Active-low logic input for sleep mode to minimize power consumption; allow 1 ms after wake-up before issuing STEP."
      },
      {
        "number": "28",
        "name": "VBB1",
        "type": "power_in",
        "description": "Load supply for Bridge 1, 8 to 35 V operating; decouple with an electrolytic capacitor (>47 µF recommended) close to the device."
      },
      {
        "number": "29",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-sonnet-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed thermal pad is shown as required in the block diagram (grounded, with AGND/PGND connecte; The terminal list prints pin 25 as '1OUT1B', which looks like a typo. The pin-out diagram and block ; The datasheet gives no electrical type for the pins. Types for the sense, RC, VREG, VCP and CP pins ",
          "2/29 pins cited to the wrong page (name found elsewhere): ['17:RESET@p13', '27:SLEEP@p13']"
        ],
        "pages_sent": 15,
        "cost_usd": 0.1689,
        "at": "2026-10-22T21:46:49"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/3ea0f925983a4df8835c70649fa2881f.pdf",
        "pages": 15,
        "sha256": "914c40550526a032",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 29,
        "described": 29,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "a3979slptr-t.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.2,
          9.7,
          1.05
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ff242f1d3be9d09e7f929707a2c5b1ee974a4f882053b04bcdb1cd2cb21223ef",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "a3979slptr-t-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.2,
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          1.05
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "289b1fef1ccb6b2e183c25a260977b28a51e0864d233894daa7799d27066170d",
        "checked": "2026-10-22",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}