component
A1171EEWLT-P
Public Made by Adomby adom
Allegro MicroSystems, LLC Magnetic Sensors, DFN-6-EP(1.5x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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A1171EEWLT-P
Allegro MicroSystems, LLC · Magnetic Sensors · DFN-6-EP(1.5x2)
A1171EEWLT-P from Allegro MicroSystems, LLC, in a DFN-6-EP(1.5x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUTPS | output | Push-pull output providing selectable omnipolar activation or unipolar south pole activation, with output current limited to 1 mA source and -1 mA sink in the absolute maximum ratings. |
| 2 | VOUTPN | output | Push-pull output providing selectable inverted omnipolar activation or unipolar north pole activation, with output current limited to 1 mA source and -1 mA sink in the absolute maximum ratings. |
| 3 | SELECT | input | Sets the activation mode for the VOUTPx outputs: omnipolar when tied to VDD or left floating, unipolar when grounded; the SELECT current is 2 µA maximum and its voltage must be between 0 and 1/3 VDD for low or 2/3 VDD to VDD for high. |
| 4 | GND | power_in | Ground connection for the device. |
| 5 | NC | unconnected | No connection. |
| 6 | VDD | power_in | Connects the power supply to the chip, operating from 1.65 to 3.5 V with absolute maximum supply voltage of 5 V. |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | DFN-6-EP(1.5x2) |
| Category | Sensors |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 5 | V | 2 | |||
| Reverse Supply Voltage | VRDD | -0.3 | V | 2 | |||
| Output Off Voltage | VOUTPx | 5 | V | 2 | |||
| Reverse Output Voltage | VROUTPx | -0.3 | V | 2 | |||
| Output Current (Source) | IOUTPx(Source) | 1 | mA | 2 | |||
| Output Current (Sink) | IOUTPx(Sink) | -1 | mA | 2 | |||
| Operating Ambient Temperature | TA | -40 | 85 | ºC | Range E | 2 | |
| Maximum Junction Temperature | TJ(max) | 165 | ºC | 2 | |||
| Storage Temperature | Tstg | -65 | 170 | ºC | 2 | ||
| Supply Voltage Range (operating) | VDD | 1.65 | 3.5 | V | Operating, TA = 25°C | 3 | |
| Supply Voltage Range (operating, full ambient temperature) | VDD | 1.8 | V | Operating, over full ambient temperature range | 3 | ||
| Output Voltage (low, NMOS on) | VOUT(SAT) | 100 | 300 | mV | NMOS on, ISINK = 1 mA, VDD = 2.75 V | 3 | |
| Period | tPERIOD | 50 | 100 | ms | 3 | ||
| Chopping Frequency | fC | 200 | kHz | 3 | |||
| Supply Slew Rate | SR | 20 | V/ms | 3 | |||
| Supply Current (enabled) | IDD(EN) | 2 | mA | Device in awake mode (enabled) | 3 | ||
| Supply Current (disabled) | IDD(DIS) | 8 | µA | Device in sleep mode (disabled) | 3 | ||
| Average Supply Current | IDD(AV) | 3.5 | 8 | µA | VDD = 1.8 V, TA = 25°C | 3 | |
| Average Supply Current | IDD(AV) | 7.1 | 12 | µA | VDD = 3.5 V, TA = 25°C | 3 | |
| SELECT Current | ISELECT | 0 | 1 | 2 | µA | 3 | |
| Operate Point (south) | BOPS | 32 | 55 | G | valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C | 3 | |
| Operate Point (north) | BOPN | -55 | -32 | G | valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C | 3 | |
| Release Point (south) | BRPS | 6 | 26 | G | valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C | 3 | |
| Release Point (north) | BRPN | -26 | -6 | G | valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C | 3 | |
| Hysteresis | BHYS | 6 | G | valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C | 3 | ||
| Package Thermal Resistance (2-layer PCB) | RθJA | 125 | ºC/W | 2-layer PCB, with 0.23 in.2 copper area each side | 4 | ||
| Package Thermal Resistance (4-layer PCB) | RθJA | 64 | ºC/W | 4-layer PCB, based on JEDEC standard | 4 |
CAD (KiCad official)
- Symbol:
A1171EEWLT-P - Footprint:
Package_DFN_QFN:DFN-6-1EP_2x1.6mm_P0.5mm_EP1.15x1.3mm - 3D model: DFN-6-EP(1.5x2), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
a1171eewlt-p-etched.step/a1171eewlt-p-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);a1171eewlt-p.step/a1171eewlt-p.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Allegro MicroSystems, LLC datasheet (10 pp, sha256
cbe81bcf0079817d, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).