component
88Q2112-A2-NYD2A000-P123
Public Made by Adomby adom
Marvell Tech Ethernet Transceivers, TQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "88q2112-a2-nyd2a000-p123",
"version": "0.1.0",
"type": "component",
"description": "Marvell Tech Ethernet Transceivers, TQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"interface",
"88q2112-a2-nyd2a000-p123",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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],
"component": {
"mpn": "88Q2112-A2-NYD2A000-P123",
"manufacturer": "Marvell Tech",
"package": "TQFN-48(7x7)",
"pin_count": 49,
"category": "Interface",
"subcategory": "Ethernet Transceivers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603377297563545600",
"parts": {
"symbol": "88q2112-a2-nyd2a000-p123.kicad_sym",
"footprint": "88q2112-a2-nyd2a000-p123.kicad_mod",
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"lbr": "88q2112-a2-nyd2a000-p123.lbr"
},
"distributor_links": {
"lcsc": "C22387511",
"digikey": "448-88Q2112-A2-NYD2A000-P123TR-ND",
"mouser": "726-88Q2112-A20-P123"
},
"distributor_check": {
"checked_at": "2026-10-19T05:26:48Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "448-88Q2112-A2-NYD2A000-P123TR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "726-88Q2112-A20-P123",
"status": "found",
"lifecycle": "New Product"
}
},
"pins": [
{
"number": "1",
"name": "RSET",
"type": "input",
"description": "Constant voltage reference; requires an external 4.99 k 1% resistor connected to VSS."
},
{
"number": "2",
"name": "HSDACP",
"type": "passive",
"description": "Test pin; must be left floating."
},
{
"number": "3",
"name": "HSDACN",
"type": "passive",
"description": "Test pin; must be left floating."
},
{
"number": "4",
"name": "MDIP",
"type": "bidirectional",
"description": "Media dependent interface positive; used for transmit and receive in 100/1000BASE-T1 mode."
},
{
"number": "5",
"name": "MDIN",
"type": "bidirectional",
"description": "Media dependent interface negative; used for transmit and receive in 100/1000BASE-T1 mode."
},
{
"number": "6",
"name": "AVDD33",
"type": "power_in",
"description": "Analog supply, 3.3V."
},
{
"number": "7",
"name": "ATP",
"type": "passive",
"description": "Test pin; must be left floating."
},
{
"number": "8",
"name": "ATN",
"type": "passive",
"description": "Test pin; must be left floating."
},
{
"number": "9",
"name": "AVDD18",
"type": "power_in",
"description": "Analog supply, 1.8V; can be supplied externally or via the 1.8V internal regulator and supplies XTAL_IN/XTAL_OUT."
},
{
"number": "10",
"name": "XTAL_OUT",
"type": "output",
"description": "25 MHz ±100 ppm crystal reference output; leave floating when no crystal is connected."
},
{
"number": "11",
"name": "VSSC",
"type": "power_in",
"description": "XTAL ground."
},
{
"number": "12",
"name": "XTAL_IN",
"type": "input",
"description": "25 MHz ±100 ppm crystal or oscillator reference input; AC couple with 0.1 nF when driven directly and not 2.5V/3.3V tolerant."
},
{
"number": "13",
"name": "VDD33 (REG_IN)",
"type": "power_in",
"description": "Analog supply for the internal regulator, 3.3V; must be left floating (no connect) if the internal regulator is not used."
},
{
"number": "14",
"name": "VDD18_OUT",
"type": "power_out",
"description": "Internal regulator output, 1.8V; must connect to the 1.8V plane feeding AVDD18 when the internal regulator is used, otherwise left floating."
},
{
"number": "15",
"name": "AVDD18_IN",
"type": "power_in",
"description": "Regulator input, 1.8V; supply input for the internal DVDD regulator."
},
{
"number": "16",
"name": "DVDD_OUT",
"type": "power_out",
"description": "Internal regulator output, 0.9V; must connect to the DVDD plane when the internal regulator is used, otherwise left floating."
},
{
"number": "17",
"name": "DVDD",
"type": "power_in",
"description": "Digital core supply, 0.9V; can be supplied externally or via the 0.9V internal regulator."
},
{
"number": "18",
"name": "RXD[3]",
"type": "output",
"description": "RGMII receive data bit 3; sampled on the RCLK rising edge only in 100BASE-T1 and on both RCLK edges in 1000BASE-T1."
},
{
"number": "19",
"name": "RXD[2]",
"type": "output",
"description": "RGMII receive data bit 2; sampled on the RCLK rising edge only in 100BASE-T1 and on both RCLK edges in 1000BASE-T1."
},
{
"number": "20",
"name": "RXD[1]",
"type": "output",
"description": "RGMII receive data bit 1; sampled on the RCLK rising edge only in 100BASE-T1 and on both RCLK edges in 1000BASE-T1."
},
{
"number": "21",
"name": "RXD[0]",
"type": "output",
"description": "RGMII receive data bit 0; sampled on the RCLK rising edge only in 100BASE-T1 and on both RCLK edges in 1000BASE-T1."
},
{
"number": "22",
"name": "RXC",
"type": "output",
"description": "RGMII receive control signal (RX_CTL), presented according to the RGMII timing mode requirements."
},
{
"number": "23",
"name": "RCLK",
"type": "output",
"description": "RGMII receive clock output; 25 MHz in 100BASE-T1 and 125 MHz in 1000BASE-T1, both ±50 ppm."
},
{
"number": "24",
"name": "VDDO",
"type": "power_in",
"description": "Digital I/O supply, 3.3V, 2.5V or 1.8V; must be supplied externally when 2.5V or 3.3V."
},
{
"number": "25",
"name": "TCLK",
"type": "input",
"description": "RGMII transmit clock input; 25 MHz for 100BASE-T1 or 125 MHz for 1000BASE-T1, both ±50 ppm tolerance."
},
{
"number": "26",
"name": "TXC",
"type": "input",
"description": "RGMII transmit control signal (TX_CTL), presented according to the RGMII timing mode requirements."
},
{
"number": "27",
"name": "TXD[0]",
"type": "input",
"description": "RGMII transmit data bit 0; sampled on the TCLK rising edge only in 100BASE-T1 and on both TCLK edges in 1000BASE-T1."
},
{
"number": "28",
"name": "TXD[1]",
"type": "input",
"description": "RGMII transmit data bit 1; sampled on the TCLK rising edge only in 100BASE-T1 and on both TCLK edges in 1000BASE-T1."
},
{
"number": "29",
"name": "TXD[2]",
"type": "input",
"description": "RGMII transmit data bit 2; sampled on the TCLK rising edge only in 100BASE-T1 and on both TCLK edges in 1000BASE-T1."
},
{
"number": "30",
"name": "TXD[3]",
"type": "input",
"description": "RGMII transmit data bit 3; sampled on the TCLK rising edge only in 100BASE-T1 and on both TCLK edges in 1000BASE-T1."
},
{
"number": "31",
"name": "SOP",
"type": "output",
"description": "SGMII transmit data positive output; 1.25 GBaud."
},
{
"number": "32",
"name": "SON",
"type": "output",
"description": "SGMII transmit data negative output; 1.25 GBaud."
},
{
"number": "33",
"name": "AVDD18",
"type": "power_in",
"description": "Analog supply, 1.8V; can be supplied externally or via the 1.8V internal regulator."
},
{
"number": "34",
"name": "SIP",
"type": "input",
"description": "SGMII receive data positive input; 1.25 GBaud."
},
{
"number": "35",
"name": "SIN",
"type": "input",
"description": "SGMII receive data negative input; 1.25 GBaud."
},
{
"number": "36",
"name": "RESETn",
"type": "input",
"description": "Hardware reset, active-low; 0 = reset, 1 = normal operation."
},
{
"number": "37",
"name": "INTn",
"type": "output",
"description": "Interrupt output, open-drain."
},
{
"number": "38",
"name": "MDC",
"type": "input",
"description": "Management interface clock; maximum frequency 12.5 MHz and a continuous clock is not required."
},
{
"number": "39",
"name": "MDIO",
"type": "bidirectional",
"description": "Management interface data; requires a pull-up resistor of 1.5 k to 10 k."
},
{
"number": "40",
"name": "VDDO",
"type": "power_in",
"description": "Digital I/O supply, 3.3V, 2.5V or 1.8V; must be supplied externally when 2.5V or 3.3V."
},
{
"number": "41",
"name": "TX_ENABLE",
"type": "bidirectional",
"description": "Tx enable/GPIO/LED; an input by default used to block Tx packets, and can also be used as a GPIO/LED."
},
{
"number": "42",
"name": "GPIO",
"type": "bidirectional",
"description": "GPIO/LED output or SyncE recovered clock output."
},
{
"number": "43",
"name": "DVDD",
"type": "power_in",
"description": "Digital core supply, 0.9V; can be supplied externally or via the 0.9V internal regulator."
},
{
"number": "44",
"name": "WAKE_IN",
"type": "input",
"description": "Local wake-up input; leave floating when LPSD is not used."
},
{
"number": "45",
"name": "INH",
"type": "output",
"description": "Output that controls the enable of the external regulator; leave floating when LPSD is not used."
},
{
"number": "46",
"name": "VLPR",
"type": "power_in",
"description": "Regulated supply derived from the battery that powers the energy detect sensing circuit and the INH I/O."
},
{
"number": "47",
"name": "VLPF",
"type": "passive",
"description": "Connect to the external battery circuit (see Figure 9); leave floating when LPSD is not used."
},
{
"number": "48",
"name": "TSTPT",
"type": "passive",
"description": "DC test point; must be left floating."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad is printed as 'EPAD' (Table 12 / Table 9), not as a numbered pin. It is included as ; VLPR is listed as an analog pin (type A) and described as a regulated supply derived from the batter; VLPF is listed as analog (type A) and described only as a connection to the external battery circuit",
"exposed pad 49 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 50,
"cost_usd": 0.2959,
"at": "2026-10-19T05:26:31"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603377297563545600",
"pages": 233,
"sha256": "dc9e6960df0900d3",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "88q2112-a2-nyd2a000-p123.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "88q2112-a2-nyd2a000-p123-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
7.0,
7.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "0c259b1e889d1ca2dda501999ebe5f4da93e0add9c25e68e00406e5a01d9f953",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}