74LVC573APW

{
  "schema_version": 1,
  "type": "component",
  "slug": "74lvc573apw",
  "title": "74LVC573APW",
  "brief": "Nexperia Latches, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "74lvc573apw"
  ],
  "component": {
    "mpn": "74LVC573APW",
    "manufacturer": "Nexperia",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Latches",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74LVC573APW.pdf",
    "parts": {
      "symbol": "74lvc573apw.kicad_sym",
      "footprint": "74lvc573apw.kicad_mod",
      "model_3d": "74lvc573apw-etched.glb",
      "model_3d_plain": "74lvc573apw.glb",
      "model_3d_step": "74lvc573apw-etched.step",
      "model_3d_step_plain": "74lvc573apw.step",
      "lbr": "74lvc573apw.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "OE",
        "type": "input",
        "description": "Output enable input, active LOW. When HIGH, all Q outputs are placed in the high-impedance OFF-state; when LOW, outputs are driven per the latch state. Does not affect stored latch data."
      },
      {
        "number": "2",
        "name": "D0",
        "type": "input",
        "description": "Data input bit 0 to latch 1. Schmitt-trigger CMOS input, 5 V tolerant. Sampled on the HIGH-to-LOW transition of LE."
      },
      {
        "number": "3",
        "name": "D1",
        "type": "input",
        "description": "Data input bit 1 to latch 2. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "4",
        "name": "D2",
        "type": "input",
        "description": "Data input bit 2 to latch 3. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "5",
        "name": "D3",
        "type": "input",
        "description": "Data input bit 3 to latch 4. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "6",
        "name": "D4",
        "type": "input",
        "description": "Data input bit 4 to latch 5. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "7",
        "name": "D5",
        "type": "input",
        "description": "Data input bit 5 to latch 6. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "8",
        "name": "D6",
        "type": "input",
        "description": "Data input bit 6 to latch 7. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "9",
        "name": "D7",
        "type": "input",
        "description": "Data input bit 7 to latch 8. Schmitt-trigger CMOS input, 5 V tolerant."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference, 0 V."
      },
      {
        "number": "11",
        "name": "LE",
        "type": "input",
        "description": "Latch enable input, active HIGH. When HIGH the latches are transparent (Q follows D); on the HIGH-to-LOW transition the input data is stored. Minimum HIGH pulse width 3.2 ns at VCC = 3.0 V to 3.6 V."
      },
      {
        "number": "12",
        "name": "Q7",
        "type": "tri_state",
        "description": "3-state data output bit 7. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "13",
        "name": "Q6",
        "type": "tri_state",
        "description": "3-state data output bit 6. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "14",
        "name": "Q5",
        "type": "tri_state",
        "description": "3-state data output bit 5. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "15",
        "name": "Q4",
        "type": "tri_state",
        "description": "3-state data output bit 4. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "16",
        "name": "Q3",
        "type": "tri_state",
        "description": "3-state data output bit 3. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "17",
        "name": "Q2",
        "type": "tri_state",
        "description": "3-state data output bit 2. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "18",
        "name": "Q1",
        "type": "tri_state",
        "description": "3-state data output bit 1. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "19",
        "name": "Q0",
        "type": "tri_state",
        "description": "3-state data output bit 0. Drives up to -24 mA/+24 mA at VCC = 3.0 V; high-impedance when OE is HIGH."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage. Recommended operating range 1.65 V to 3.6 V (functional down to 1.2 V). Absolute maximum 6.5 V."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/74LVC573APW.pdf",
        "pages": 16,
        "sha256": "fc791a4ee5d2cc1f",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74LVC573",
      "logic_family": "74LVC",
      "function_code": "573",
      "function_class": "Latch",
      "function_name": "Octal D Latch with 3-State Outputs",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
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        "file": "74lvc573apw.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74lvc573apw-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3dc49103dd9cdb2ff7d083b5bca227bf4e2adc41661d0cc64506ad0f4cac37d1",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Nexperia",
      "Package": "TSSOP-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "74lvc573apw"
  ],
  "discovery_pitch": "74LVC573APW (Nexperia) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74lvc573apw.kicad_sym",
    "74lvc573apw.kicad_mod",
    "74lvc573apw.glb",
    "74lvc573apw.step",
    "74lvc573apw.lbr",
    "docs/hero.png",
    "docs/74lvc573apw-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "74lvc573apw-etched.step"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T15:16:57.102Z"
}