component

74LVC1G11W6-7

Public Made by Adom

by adom

Diodes Incorporated Gates, SOT-26. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 74lvc1g11w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
74lvc1g11w6-7-etched.fit.json 74lvc1g11w6-7: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
74lvc1g11w6-7-etched.glb 74lvc1g11w6-7: one-pass backfill (re-etched) · Ray
74lvc1g11w6-7-etched.step 74lvc1g11w6-7: one-pass backfill (re-etched) · Ray
74lvc1g11w6-7-hero.glb Publish 0.2.1 · Ray
74lvc1g11w6-7-hero.overlay.json Publish 0.2.1 · Ray
74lvc1g11w6-7.glb Publish 0.1.0 · Ray
74lvc1g11w6-7.kicad_mod Publish 0.1.0 · Ray
74lvc1g11w6-7.kicad_sym Publish 0.1.0 · Ray
74lvc1g11w6-7.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
74lvc1g11w6-7.step Publish 0.1.0 · Ray
package.json Publish 0.2.2 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.2 · Ray
README.md 74lvc1g11w6-7: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

74LVC1G11W6-7

Diodes Incorporated · Gates · SOT-26

74LVC1G11W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data input A of the 3-input AND gate. CMOS input, 5.5V tolerant regardless of VCC. Unused inputs should be tied to VCC or GND.
2 GND power_in Ground reference (0 V) for the device.
3 B input Data input B of the 3-input AND gate. CMOS input, 5.5V tolerant regardless of VCC. Unused inputs should be tied to VCC or GND.
4 Y output Data output Y = A · B · C. Push-pull CMOS output; ±24 mA drive at VCC = 3V. IOFF circuitry disables the output during partial-power-down.
5 VCC power_in Supply voltage input, 1.65V to 5.5V operating range (1.5V minimum for data retention). Decouple with a local ceramic capacitor to GND.
6 C input Data input C of the 3-input AND gate. CMOS input, 5.5V tolerant regardless of VCC. Unused inputs should be tied to VCC or GND.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-26
Category Logic
Pins 6

Ordering variants

  • 74LVC1G11W6-7

CAD (KiCad official)

  • Symbol: 74LVC1G11W6-7
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-26 (KiCad packages3D, STEP)
  • 3D model files: 74lvc1g11w6-7-etched.step / 74lvc1g11w6-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74lvc1g11w6-7.step / 74lvc1g11w6-7.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
74lvc1g11w6-7.step 97 KB You want the bare part, or you mark your own boards.
74lvc1g11w6-7-etched.step 1.7 MB You want the part with 74LVC1G11W6-7 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 455 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (12 pp, sha256 f80971eb32dfb18a, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF