74LV165AD

{
  "slug": "74lv165ad",
  "version": "0.1.0",
  "type": "component",
  "description": "Nexperia Shift Registers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "74lv165ad",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74lv165ad.kicad_sym",
    "74lv165ad.kicad_mod",
    "74lv165ad.glb",
    "74lv165ad.step",
    "74lv165ad.lbr",
    "docs/hero.png",
    "docs/74lv165ad-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "74lv165ad-hero.glb",
    "74lv165ad-hero.overlay.json",
    "74lv165ad-etched.glb"
  ],
  "component": {
    "mpn": "74LV165AD",
    "manufacturer": "Nexperia",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904509100216320",
    "parts": {
      "symbol": "74lv165ad.kicad_sym",
      "footprint": "74lv165ad.kicad_mod",
      "model_3d": "74lv165ad-hero.glb",
      "model_3d_plain": "74lv165ad-etched.glb",
      "model_3d_step": "74lv165ad-etched.step",
      "model_3d_step_plain": "74lv165ad.step",
      "lbr": "74lv165ad.lbr"
    },
    "distributor_links": {
      "lcsc": "C478150",
      "mouser": "771-74LV165AD"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T04:31:57Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": "771-74LV165AD",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "PL",
        "type": "input",
        "description": "Parallel enable input (active LOW); when LOW, data on D0 to D7 is loaded into the register asynchronously."
      },
      {
        "number": "2",
        "name": "CP",
        "type": "input",
        "description": "Clock input, LOW-to-HIGH edge-triggered; CE should only make its LOW-to-HIGH transition while CP is HIGH for predictable operation."
      },
      {
        "number": "3",
        "name": "D4",
        "type": "input",
        "description": "Parallel data input D4, loaded into the register when PL is LOW."
      },
      {
        "number": "4",
        "name": "D5",
        "type": "input",
        "description": "Parallel data input D5, loaded into the register when PL is LOW."
      },
      {
        "number": "5",
        "name": "D6",
        "type": "input",
        "description": "Parallel data input D6, loaded into the register when PL is LOW."
      },
      {
        "number": "6",
        "name": "D7",
        "type": "input",
        "description": "Parallel data input D7, loaded into the register when PL is LOW."
      },
      {
        "number": "7",
        "name": "Q7 (complementary)",
        "type": "output",
        "description": "Complementary serial output from the last stage (inverted Q7)."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground (0 V)."
      },
      {
        "number": "9",
        "name": "Q7",
        "type": "output",
        "description": "Serial output from the last stage; can be tied to DS of the succeeding stage for expansion."
      },
      {
        "number": "10",
        "name": "DS",
        "type": "input",
        "description": "Serial data input; data enters the register serially when PL is HIGH."
      },
      {
        "number": "11",
        "name": "D0",
        "type": "input",
        "description": "Parallel data input D0, loaded into the register when PL is LOW."
      },
      {
        "number": "12",
        "name": "D1",
        "type": "input",
        "description": "Parallel data input D1, loaded into the register when PL is LOW."
      },
      {
        "number": "13",
        "name": "D2",
        "type": "input",
        "description": "Parallel data input D2, loaded into the register when PL is LOW."
      },
      {
        "number": "14",
        "name": "D3",
        "type": "input",
        "description": "Parallel data input D3, loaded into the register when PL is LOW."
      },
      {
        "number": "15",
        "name": "CE",
        "type": "input",
        "description": "Clock enable input (active LOW); the clock input is gated by this pin."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, 2.0 V to 5.5 V recommended operating range."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The overbars on Q7 were lost in text extraction, so both outputs print as 'Q7'. Pin 7 is mapped to t; The datasheet's pinning diagram and Table 2 agree for all 16 pins. D0 to D7 pin assignments were tak"
        ],
        "pages_sent": 16,
        "cost_usd": 0.0811,
        "at": "2026-10-18T04:29:36"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588904509100216320",
        "pages": 16,
        "sha256": "5200e6b7998d1565",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "74lv165ad.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74lv165ad-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "b7e51329496d626e8d28abdd229998a2f3d1436049f5ca35f6fa17ca445259a6",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}