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74HCT32BQ-Q100

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Nexperia Gates, DHVQFN-14(2.5x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic ics74hct32bq-q100factory-2.0.0extractor-text

Verified 74HCT32BQ-Q100

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 15 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 74HCT32BQ-Q100 · DHVQFN-14(2.5x3) · 15 pins
  • ✓copper: 15 copper pads, none touching another net
  • ✓datasheet: all 15 pin names found in the 12-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: DHVQFN-14-1EP_2.5x3mm_P0.5mm_EP1x1.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1790983m/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.9)
  • ✓pads: 15 pins = 15 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 15 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 74hct32bq-q100.kicad_sym✓ 74hct32bq-q100.kicad_mod✓ 74hct32bq-q100.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8h ago
viewers 74hct32bq-q100: viewers · Ray 8h ago
74hct32bq-q100-etched.glb Publish 0.1.0 · Ray 8h ago
74hct32bq-q100-etched.step 74hct32bq-q100: factory component page (tier=mfr) · Ray 8h ago
74hct32bq-q100-hero.glb 74hct32bq-q100: hero GLB from the etched model (keeps the MPN mark) · Ray 8h ago
74hct32bq-q100-hero.overlay.json Publish 0.1.0 · Ray 8h ago
74hct32bq-q100.glb Publish 0.1.0 · Ray 8h ago
74hct32bq-q100.kicad_mod Publish 0.1.0 · Ray 8h ago
74hct32bq-q100.kicad_sym Publish 0.1.0 · Ray 8h ago
74hct32bq-q100.lbr Publish 0.1.0 · Ray 8h ago
74hct32bq-q100.step Publish 0.1.0 · Ray 8h ago
package.json Publish 0.1.0 · Ray 8h ago
page.json Set visibility: public · Ray 8h ago
README.md Publish 0.1.0 · Ray 8h ago
verification.json Verified: Published by the parts factory: tier mfr, 15 pins · Ray 8h ago

74HCT32BQ-Q100

Nexperia · Gates · DHVQFN-14(2.5x3)

74HCT32BQ-Q100 from Nexperia, in a DHVQFN-14(2.5x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input A of OR gate 1; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
2 1B input Data input B of OR gate 1; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
3 1Y output Data output of OR gate 1, where Y = A OR B per the function table.
4 2A input Data input A of OR gate 2; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
5 2B input Data input B of OR gate 2; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
6 2Y output Data output of OR gate 2, where Y = A OR B per the function table.
7 GND power_in Ground (0 V) reference; all voltages in the datasheet are referenced to this pin.
8 3Y output Data output of OR gate 3, where Y = A OR B per the function table.
9 3A input Data input A of OR gate 3; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
10 3B input Data input B of OR gate 3; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
11 4Y output Data output of OR gate 4, where Y = A OR B per the function table.
12 4A input Data input A of OR gate 4; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
13 4B input Data input B of OR gate 4; inputs include clamp diodes, so current-limiting resistors can be used to interface voltages above VCC.
14 VCC power_in Supply voltage: 2.0 V to 6.0 V for 74HC32-Q100 and 4.5 V to 5.5 V for 74HCT32-Q100 per recommended operating conditions; absolute maximum +7 V.
15 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-14(2.5x3)
Category Logic ICs
Pins 15

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC -0.5 7 V 3
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V [1] 3
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V [1] 3
Output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 3
Supply current ICC 50 mA 3
Ground current IGND -50 mA 3
Storage temperature Tstg -65 150 °C 3
Total power dissipation Ptot 500 mW [2] DHVQFN14 (SOT762-1): derates linearly 9.6 mW/K above 98 °C 3
Supply voltage VCC 4.5 5 5.5 V 74HCT32-Q100 3
Input voltage VI 0 V Maximum printed as VCC 3
Output voltage VO 0 V Maximum printed as VCC 3
Ambient temperature Tamb -40 125 °C 3
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 3
HIGH-level input voltage VIH 2 1.6 V VCC = 4.5 V to 5.5 V; 25 °C 4
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 4
LOW-level input voltage VIL 1.2 0.8 V VCC = 4.5 V to 5.5 V; 25 °C 4
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 4
HIGH-level output voltage (IO = -20 µA) VOH 4.4 4.5 V VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; 25 °C 4
HIGH-level output voltage (IO = -20 µA) VOH 4.4 V VI = VIH or VIL; VCC = 4.5 V; IO = -20 μA; -40 °C to +85 °C 4
HIGH-level output voltage (IO = -4.0 mA) VOH 3.98 4.32 V VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; 25 °C 4
HIGH-level output voltage (IO = -4.0 mA) VOH 3.84 V VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; -40 °C to +85 °C 4
HIGH-level output voltage (IO = -4.0 mA) VOH 3.7 V VI = VIH or VIL; VCC = 4.5 V; IO = -4.0 mA; -40 °C to +125 °C 4
LOW-level output voltage (IO = 20 µA) VOL 0 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; 25 °C 4
LOW-level output voltage (IO = 20 µA) VOL 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 20 μA; -40 °C to +85 °C 4
LOW-level output voltage (IO = 5.2 mA) VOL 0.15 0.25 V VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; 25 °C 4
LOW-level output voltage (IO = 5.2 mA) VOL 0.33 V VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; -40 °C to +85 °C 4
LOW-level output voltage (IO = 5.2 mA) VOL 0.4 V VI = VIH or VIL; VCC = 4.5 V; IO = 5.2 mA; -40 °C to +125 °C 4
Input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 5.5 V; 25 °C 5
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 5.5 V; -40 °C to +85 °C 5
Supply current ICC 2 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 5
Supply current ICC 20 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +85 °C 5
Supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 5
Additional supply current per input pin ΔICC 430 μA Per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; 25 °C 5
Additional supply current per input pin ΔICC 540 μA Per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +85 °C 5
Additional supply current per input pin ΔICC 590 μA Per input pin; VI = VCC - 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C 5
Propagation delay nA, nB to nY tpd 11 24 ns nA, nB to nY; VCC = 4.5 V; CL = 50 pF; see Fig. 6; 25 °C 5
Propagation delay nA, nB to nY tpd 30 ns nA, nB to nY; VCC = 4.5 V; CL = 50 pF; see Fig. 6; -40 °C to +85 °C 5
Propagation delay nA, nB to nY tpd 36 ns nA, nB to nY; VCC = 4.5 V; CL = 50 pF; see Fig. 6; -40 °C to +125 °C 5
Transition time tt 7 15 ns VCC = 4.5 V; CL = 50 pF; see Fig. 6; 25 °C 5
Transition time tt 19 ns VCC = 4.5 V; CL = 50 pF; see Fig. 6; -40 °C to +85 °C 5
Transition time tt 22 ns VCC = 4.5 V; CL = 50 pF; see Fig. 6; -40 °C to +125 °C 5

CAD (KiCad official)

  • Symbol: 74HCT32BQ-Q100
  • Footprint: Package_DFN_QFN:DHVQFN-14-1EP_2.5x3mm_P0.5mm_EP1x1.5mm
  • 3D model: DHVQFN-14(2.5x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 74hct32bq-q100-etched.step / 74hct32bq-q100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hct32bq-q100.step / 74hct32bq-q100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 7298aa3d0ab9a5ee, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF