component
74HC377D
Public Made by Adomby adom
Nexperia Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Data enable input, active LOW: when E is LOW the outputs Qn take the state of Dn at the LOW-to-HIGH CP transition, and E must be stable one set-up time before that transition."
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{
"number": "2",
"name": "Q0",
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"description": "Flip-flop output 0, which assumes the state of D0 on the LOW-to-HIGH clock transition when E is LOW."
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{
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{
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"description": "Data input 1, sampled on the LOW-to-HIGH CP transition within the set-up and hold times; inputs include clamp diodes so input voltages above VCC are allowed with a current limiting resistor (IIK limited to ±20 mA)."
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{
"number": "5",
"name": "Q1",
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"description": "Flip-flop output 1, which assumes the state of D1 on the LOW-to-HIGH clock transition when E is LOW."
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{
"number": "6",
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"description": "Flip-flop output 2, which assumes the state of D2 on the LOW-to-HIGH clock transition when E is LOW."
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{
"number": "7",
"name": "D2",
"type": "input",
"description": "Data input 2, sampled on the LOW-to-HIGH CP transition within the set-up and hold times; inputs include clamp diodes so input voltages above VCC are allowed with a current limiting resistor (IIK limited to ±20 mA)."
},
{
"number": "8",
"name": "D3",
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"description": "Data input 3, sampled on the LOW-to-HIGH CP transition within the set-up and hold times; inputs include clamp diodes so input voltages above VCC are allowed with a current limiting resistor (IIK limited to ±20 mA)."
},
{
"number": "9",
"name": "Q3",
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"description": "Flip-flop output 3, which assumes the state of D3 on the LOW-to-HIGH clock transition when E is LOW."
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{
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{
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"description": "Clock input, edge triggered on the LOW-to-HIGH transition; the Qn outputs update only on this edge."
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{
"number": "12",
"name": "Q4",
"type": "output",
"description": "Flip-flop output 4, which assumes the state of D4 on the LOW-to-HIGH clock transition when E is LOW."
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{
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"description": "Data input 4, sampled on the LOW-to-HIGH CP transition within the set-up and hold times; inputs include clamp diodes so input voltages above VCC are allowed with a current limiting resistor (IIK limited to ±20 mA)."
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{
"number": "14",
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"description": "Data input 5, sampled on the LOW-to-HIGH CP transition within the set-up and hold times; inputs include clamp diodes so input voltages above VCC are allowed with a current limiting resistor (IIK limited to ±20 mA)."
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{
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{
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{
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"name": "LOW-level output voltage",
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"name": "LOW-level output voltage",
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