main
Ray 74hc30s: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 2807880 27d ago
{
  "schema_version": 1,
  "type": "component",
  "slug": "74hc30s",
  "title": "74HC30S",
  "brief": "GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "74hc30s"
  ],
  "component": {
    "mpn": "74HC30S",
    "manufacturer": "GR",
    "package": "SOP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Gates",
    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312261746_GR-74HC30S_C19818870.pdf",
    "parts": {
      "symbol": "74hc30s.kicad_sym",
      "footprint": "74hc30s.kicad_mod",
      "model_3d": "74hc30s-etched.glb",
      "model_3d_plain": "74hc30s.glb",
      "model_3d_step": "74hc30s-etched.step",
      "model_3d_step_plain": "74hc30s.step",
      "lbr": "74hc30s.lbr"
    },
    "distributor_links": {
      "lcsc": "C19818870"
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "NAND gate input A. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "NAND gate input B. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "3",
        "name": "C",
        "type": "input",
        "description": "NAND gate input C. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "4",
        "name": "D",
        "type": "input",
        "description": "NAND gate input D. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "5",
        "name": "E",
        "type": "input",
        "description": "NAND gate input E. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "6",
        "name": "F",
        "type": "input",
        "description": "NAND gate input F. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground / 0 V reference for the device."
      },
      {
        "number": "8",
        "name": "Y",
        "type": "output",
        "description": "8-input NAND gate output Y = NOT(A·B·C·D·E·F·G·H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT ±25 mA."
      },
      {
        "number": "9",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. Leave floating or tie to a static level."
      },
      {
        "number": "10",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. Leave floating or tie to a static level."
      },
      {
        "number": "11",
        "name": "G",
        "type": "input",
        "description": "NAND gate input G. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "12",
        "name": "H",
        "type": "input",
        "description": "NAND gate input H. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA."
      },
      {
        "number": "13",
        "name": "NC",
        "type": "unconnected",
        "description": "No connection. Leave floating or tie to a static level."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Operating range 2.0 V to 6.0 V (typ 5 V); absolute-max 6.5 V. Bypass to GND with a local ceramic capacitor near the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312261746_GR-74HC30S_C19818870.pdf",
        "pages": 5,
        "sha256": "53b21b6590ca178d",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -3.81
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HC30",
      "logic_family": "74HC",
      "function_code": "30",
      "function_class": "Gate",
      "function_name": "8-Input NAND Gate",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "74hc30s.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74hc30s-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.7,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "e60647496e75ed84f2db0e7ba98c42042750a6983bac69649bc06502bdff5fe8",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "GR",
      "Package": "SOP-14",
      "Category": "Logic",
      "Pins": "14"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "74hc30s"
  ],
  "discovery_pitch": "74HC30S (GR) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74hc30s.kicad_sym",
    "74hc30s.kicad_mod",
    "74hc30s.glb",
    "74hc30s.step",
    "74hc30s-etched.step",
    "74hc30s.lbr",
    "docs/hero.png",
    "docs/74hc30s-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T14:57:45.412Z"
}