main
Ray pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) 3f14e52 2mo ago
{
 "schema": "adom.pads/1",
 "slug": "74hc30s",
 "footprint": "SOIC-14_3.9x8.7mm_P1.27mm",
 "generated_from": {
  "footprint": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.475,
   -3.81
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOIC-14_3.9x8.7mm_P1.27mm@sha256:a885b619b22880c9"
 },
 "pad_count": 14,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "A",
   "type": "input",
   "description": "NAND gate input A. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": true,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "B",
   "type": "input",
   "description": "NAND gate input B. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "C",
   "type": "input",
   "description": "NAND gate input C. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "D",
   "type": "input",
   "description": "NAND gate input D. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "E",
   "type": "input",
   "description": "NAND gate input E. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "F",
   "type": "input",
   "description": "NAND gate input F. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "GND",
   "type": "power_in",
   "description": "Ground / 0 V reference for the device.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "Y",
   "type": "output",
   "description": "8-input NAND gate output Y = NOT(A·B·C·D·E·F·G·H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT ±25 mA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "NC",
   "type": "unconnected",
   "description": "No connection. Leave floating or tie to a static level.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "NC",
   "type": "unconnected",
   "description": "No connection. Leave floating or tie to a static level.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "G",
   "type": "input",
   "description": "NAND gate input G. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -1.27
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "H",
   "type": "input",
   "description": "NAND gate input H. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -2.54
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "NC",
   "type": "unconnected",
   "description": "No connection. Leave floating or tie to a static level.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.475,
    -3.81
   ],
   "rot": 0.0,
   "size": [
    1.95,
    0.6
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive supply. Operating range 2.0 V to 6.0 V (typ 5 V); absolute-max 6.5 V. Bypass to GND with a local ceramic capacitor near the pin.",
   "is_pin1": false,
   "source": {
    "geometry": "SOIC-14_3.9x8.7mm_P1.27mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}