component
74HC166PW
Public Made by Adomby adom
Nexperia Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"type": "component",
"description": "Nexperia Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"74hc166pw.step",
"74hc166pw.lbr",
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"component": {
"mpn": "74HC166PW",
"manufacturer": "Nexperia",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Logic",
"subcategory": "Shift Registers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908009615056896",
"parts": {
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"footprint": "74hc166pw.kicad_mod",
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"model_3d_plain": "74hc166pw-etched.glb",
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"model_3d_step_plain": "74hc166pw.step",
"lbr": "74hc166pw.lbr"
},
"distributor_links": {
"lcsc": "C546649"
},
"distributor_check": {
"checked_at": "2026-10-18T07:37:45Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "DS",
"type": "input",
"description": "Serial data input; data enters the register serially at DS on each LOW-to-HIGH CP transition when PE is HIGH."
},
{
"number": "2",
"name": "D0",
"type": "input",
"description": "Parallel data input D0, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "3",
"name": "D1",
"type": "input",
"description": "Parallel data input D1, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "4",
"name": "D2",
"type": "input",
"description": "Parallel data input D2, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "5",
"name": "D3",
"type": "input",
"description": "Parallel data input D3, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "6",
"name": "CE",
"type": "input",
"description": "Clock enable input, active LOW; data shifts on LOW-to-HIGH CP transitions while CE is LOW, and a HIGH on CE disables the CP input."
},
{
"number": "7",
"name": "CP",
"type": "input",
"description": "Clock input, LOW-to-HIGH edge-triggered; drives the parallel load and serial shift operations."
},
{
"number": "8",
"name": "GND",
"type": "power_in",
"description": "Ground (0 V) reference for all voltages."
},
{
"number": "9",
"name": "MR",
"type": "input",
"description": "Asynchronous master reset, active LOW; clears the register independently of the clock."
},
{
"number": "10",
"name": "D4",
"type": "input",
"description": "Parallel data input D4, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "11",
"name": "D5",
"type": "input",
"description": "Parallel data input D5, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "12",
"name": "D6",
"type": "input",
"description": "Parallel data input D6, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "13",
"name": "Q7",
"type": "output",
"description": "Serial output from the last stage of the 8-bit shift register."
},
{
"number": "14",
"name": "D7",
"type": "input",
"description": "Parallel data input D7, loaded into the register on the LOW-to-HIGH CP transition when PE is LOW."
},
{
"number": "15",
"name": "PE",
"type": "input",
"description": "Parallel enable input, active LOW; LOW loads D0 to D7 on the next CP LOW-to-HIGH transition and HIGH selects serial entry at DS."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Positive supply voltage; recommended 2.0 V to 6.0 V for 74HC166 and 4.5 V to 5.5 V for 74HCT166."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 17,
"cost_usd": 0.0862,
"at": "2026-10-18T07:36:29"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908009615056896",
"pages": 17,
"sha256": "eaa7369d88204bc2",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint_binding": "identity",
"sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
"checked": "2026-10-18",
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