74HC164N

{
  "schema_version": 1,
  "type": "component",
  "slug": "74hc164n",
  "title": "74HC164N",
  "brief": "HGSEMI Shift Registers, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
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    "74hc164n",
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  "component": {
    "mpn": "74HC164N",
    "manufacturer": "HGSEMI",
    "package": "DIP-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8758075291695112192",
    "parts": {
      "symbol": "74hc164n.kicad_sym",
      "footprint": "74hc164n.kicad_mod",
      "model_3d": "74hc164n-hero.glb",
      "model_3d_plain": "74hc164n-etched.glb",
      "model_3d_step": "74hc164n-etched.step",
      "model_3d_step_plain": "74hc164n.step",
      "lbr": "74hc164n.lbr"
    },
    "distributor_links": {
      "lcsc": "C507185"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T01:04:23Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "A",
        "type": "input",
        "description": "Serial data input A; it is ANDed with input B (QA = A·B) to form the data entering the first register stage, and it is sampled on the rising clock edge."
      },
      {
        "number": "2",
        "name": "B",
        "type": "input",
        "description": "Serial data input B; it is ANDed with input A (QA = A·B) to form the data entering the first register stage, and it is sampled on the rising clock edge."
      },
      {
        "number": "3",
        "name": "Qa",
        "type": "output",
        "description": "Register output Qa, the first bit of the 8-bit shift register, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "4",
        "name": "Qb",
        "type": "output",
        "description": "Register output Qb, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "5",
        "name": "Qc",
        "type": "output",
        "description": "Register output Qc, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "6",
        "name": "Qd",
        "type": "output",
        "description": "Register output Qd, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for the device."
      },
      {
        "number": "8",
        "name": "CLOCK",
        "type": "input",
        "description": "Clock input, active on the rising edge, with a minimum clock or clear pulse width of 18 ns (tW)."
      },
      {
        "number": "9",
        "name": "CLEAR",
        "type": "input",
        "description": "Active-low clear input that resets the register outputs to low; minimum clear pulse width is 18 ns (tW)."
      },
      {
        "number": "10",
        "name": "Qe",
        "type": "output",
        "description": "Register output Qe, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "11",
        "name": "Qf",
        "type": "output",
        "description": "Register output Qf, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "12",
        "name": "Qg",
        "type": "output",
        "description": "Register output Qg, which shifts one position to the right on each rising CLOCK edge."
      },
      {
        "number": "13",
        "name": "Qh",
        "type": "output",
        "description": "Register output Qh, the last bit of the 8-bit shift register, which shifts out on each rising CLOCK edge."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply; the recommended operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
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        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: In the datasheet pin table, pins 8 and 9 are CLOCK and CLEAR for the DIP/SOP/TSSOP packages; the 'NC; The datasheet gives a single shared pin table for DIP/SOP/TSSOP; the DIP-14 pin numbers were taken f",
          "1/14 pin names appear NOWHERE in the datasheet text: ['5:Qc@p2']"
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        "at": "2026-10-19T01:02:03"
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      "pins": {
        "total": 14,
        "described": 14,
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  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "DIP-14",
      "Category": "Logic",
      "Pins": "14"
    },
    "characteristics": {
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          "name": "Current per pin into VCC or GND",
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          "min": 0,
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          "name": "Input current",
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        {
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