74HC161M

{
  "schema_version": 1,
  "type": "component",
  "slug": "74hc161m",
  "title": "74HC161M",
  "brief": "HGSEMI Counters, Dividers, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "74hc161m"
  ],
  "component": {
    "mpn": "74HC161M",
    "manufacturer": "HGSEMI",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Counters, Dividers",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603087551457095680",
    "parts": {
      "symbol": "74hc161m.kicad_sym",
      "footprint": "74hc161m.kicad_mod",
      "model_3d": "74hc161m-etched.glb",
      "model_3d_plain": "74hc161m.glb",
      "model_3d_step": "74hc161m-etched.step",
      "model_3d_step_plain": "74hc161m.step",
      "lbr": "74hc161m.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "MR",
        "type": "input",
        "description": "Asynchronous master reset (active LOW). Driving MR LOW forces Q0-Q3 LOW regardless of the state of CP, PE, CET and CEP."
      },
      {
        "number": "2",
        "name": "CP",
        "type": "input",
        "description": "Clock input, positive-edge triggered (LOW-to-HIGH transition). All internal flip-flops are clocked simultaneously on the rising edge."
      },
      {
        "number": "3",
        "name": "D0",
        "type": "input",
        "description": "Parallel data input bit 0. Loaded into Q0 on the rising edge of CP when PE is LOW."
      },
      {
        "number": "4",
        "name": "D1",
        "type": "input",
        "description": "Parallel data input bit 1. Loaded into Q1 on the rising edge of CP when PE is LOW."
      },
      {
        "number": "5",
        "name": "D2",
        "type": "input",
        "description": "Parallel data input bit 2. Loaded into Q2 on the rising edge of CP when PE is LOW."
      },
      {
        "number": "6",
        "name": "D3",
        "type": "input",
        "description": "Parallel data input bit 3. Loaded into Q3 on the rising edge of CP when PE is LOW."
      },
      {
        "number": "7",
        "name": "CEP",
        "type": "input",
        "description": "Count enable input (active HIGH). Both CEP and CET must be HIGH to enable counting."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference, 0 V."
      },
      {
        "number": "9",
        "name": "PE",
        "type": "input",
        "description": "Parallel enable input (active LOW). When PE is LOW, D0-D3 are loaded into Q0-Q3 on the next rising edge of CP, disabling the counting action."
      },
      {
        "number": "10",
        "name": "CET",
        "type": "input",
        "description": "Count enable carry input (active HIGH). Fed forward to enable the terminal count output (TC); both CEP and CET must be HIGH to count."
      },
      {
        "number": "11",
        "name": "Q3",
        "type": "output",
        "description": "Flip-flop output bit 3 (MSB) of the 4-bit counter."
      },
      {
        "number": "12",
        "name": "Q2",
        "type": "output",
        "description": "Flip-flop output bit 2 of the 4-bit counter."
      },
      {
        "number": "13",
        "name": "Q1",
        "type": "output",
        "description": "Flip-flop output bit 1 of the 4-bit counter."
      },
      {
        "number": "14",
        "name": "Q0",
        "type": "output",
        "description": "Flip-flop output bit 0 (LSB) of the 4-bit counter."
      },
      {
        "number": "15",
        "name": "TC",
        "type": "output",
        "description": "Terminal count output. Goes HIGH when CET is HIGH and the counter reaches terminal count (HHHH = 15); produces a HIGH pulse approximately equal in duration to a HIGH output of Q0, used to enable the next cascaded stage."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage, 2.0 V to 6.0 V (5.0 V typical)."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603087551457095680",
        "pages": 15,
        "sha256": "1cbf2beb03386af9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC161",
      "logic_family": "74HC",
      "function_code": "161",
      "function_class": "Counter",
      "function_name": "Synchronous 4-Bit Binary Counter",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "74hc161m.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74hc161m-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "fd48b510b9061ea0b81cefa3be2ed66a0bd5f2ddef955de6a4bfc29fee990a4c",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "SOP-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "variants": [
    {
      "mpn": "74HC161MM/TR",
      "kind": "packaging"
    },
    {
      "mpn": "74HC161MMT/TR",
      "kind": "packaging"
    },
    {
      "mpn": "74HC161MMS/TR",
      "kind": "packaging"
    }
  ],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "74hc161m"
  ],
  "discovery_pitch": "74HC161M (HGSEMI) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74hc161m.kicad_sym",
    "74hc161m.kicad_mod",
    "74hc161m.glb",
    "74hc161m.step",
    "74hc161m.lbr",
    "docs/hero.png",
    "docs/74hc161m-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T14:53:51.718Z"
}