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74HC08PW-Q100

Public Made by Adom

by adom

Nexperia Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC08PW-Q100

Nexperia · Logic Gates · TSSOP-14

74HC08PW-Q100 from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of AND gate 1; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
2 1B input Data input of AND gate 1; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
3 1Y output Data output of AND gate 1 (Y = 1A AND 1B); output voltage range is 0 V to VCC and the output current rating is ±25 mA.
4 2A input Data input of AND gate 2; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
5 2B input Data input of AND gate 2; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
6 2Y output Data output of AND gate 2 (Y = 2A AND 2B); output voltage range is 0 V to VCC and the output current rating is ±25 mA.
7 GND power_in Ground reference (0 V); all datasheet voltages are referenced to this pin.
8 3Y output Data output of AND gate 3 (Y = 3A AND 3B); output voltage range is 0 V to VCC and the output current rating is ±25 mA.
9 3A input Data input of AND gate 3; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
10 3B input Data input of AND gate 3; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
11 4Y output Data output of AND gate 4 (Y = 4A AND 4B); output voltage range is 0 V to VCC and the output current rating is ±25 mA.
12 4A input Data input of AND gate 4; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
13 4B input Data input of AND gate 4; the datasheet states inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC, with input voltage range 0 V to VCC.
14 VCC power_in Supply voltage; recommended 2.0 V to 6.0 V for 74HC08-Q100 and 4.5 V to 5.5 V for 74HCT08-Q100, with absolute maximum -0.5 V to +7 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: 74HC08PW-Q100
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hc08pw-q100-etched.step / 74hc08pw-q100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc08pw-q100.step / 74hc08pw-q100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 6f32abaec1b6f0ca, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF