component
74HC02M
Public Made by Adomby adom
HGSEMI Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
74hc02m: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
c308534
27d ago
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{
"schema_version": 1,
"type": "component",
"slug": "74hc02m",
"title": "74HC02M",
"brief": "HGSEMI Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"74hc02m"
],
"component": {
"mpn": "74HC02M",
"manufacturer": "HGSEMI",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic",
"subcategory": "Gates",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/95635374d7ec744bb3c7049f495bf48d.pdf",
"parts": {
"symbol": "74hc02m.kicad_sym",
"footprint": "74hc02m.kicad_mod",
"model_3d": "74hc02m-etched.glb",
"model_3d_plain": "74hc02m.glb",
"model_3d_step": "74hc02m-etched.step",
"model_3d_step_plain": "74hc02m.step",
"lbr": "74hc02m.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "Y1",
"type": "output",
"description": "Gate 1 NOR output. Y1 = NOT(A1 + B1). CMOS output capable of driving 10 LSTTL loads; VOH >= VCC-0.1 V and VOL <= 0.1 V at |Iout| <= 20 uA."
},
{
"number": "2",
"name": "A1",
"type": "input",
"description": "Gate 1 NOR input A. High-impedance CMOS input; VIH >= 0.7*VCC and VIL <= 0.3*VCC (approx). Maximum input leakage 1.0 uA. Unused inputs must be tied to VCC or GND."
},
{
"number": "3",
"name": "B1",
"type": "input",
"description": "Gate 1 NOR input B. High-impedance CMOS input; must be tied to a valid logic level (unused inputs to VCC or GND)."
},
{
"number": "4",
"name": "Y2",
"type": "output",
"description": "Gate 2 NOR output. Y2 = NOT(A2 + B2). CMOS push-pull output; drives 10 LSTTL loads."
},
{
"number": "5",
"name": "A2",
"type": "input",
"description": "Gate 2 NOR input A. High-impedance CMOS input."
},
{
"number": "6",
"name": "B2",
"type": "input",
"description": "Gate 2 NOR input B. High-impedance CMOS input."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Device ground / 0 V reference. All inputs and outputs are referenced to GND."
},
{
"number": "8",
"name": "A3",
"type": "input",
"description": "Gate 3 NOR input A. High-impedance CMOS input."
},
{
"number": "9",
"name": "B3",
"type": "input",
"description": "Gate 3 NOR input B. High-impedance CMOS input."
},
{
"number": "10",
"name": "Y3",
"type": "output",
"description": "Gate 3 NOR output. Y3 = NOT(A3 + B3). CMOS push-pull output."
},
{
"number": "11",
"name": "A4",
"type": "input",
"description": "Gate 4 NOR input A. High-impedance CMOS input."
},
{
"number": "12",
"name": "B4",
"type": "input",
"description": "Gate 4 NOR input B. High-impedance CMOS input."
},
{
"number": "13",
"name": "Y4",
"type": "output",
"description": "Gate 4 NOR output. Y4 = NOT(A4 + B4). CMOS push-pull output."
},
{
"number": "14",
"name": "VCC",
"type": "power_in",
"description": "Positive supply. Operating range 2.0 V to 6.0 V (absolute maximum 7.0 V). Bypass locally to GND with a 0.1 uF ceramic capacitor."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/95635374d7ec744bb3c7049f495bf48d.pdf",
"pages": 9,
"sha256": "868940124e153af6",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "74HC02",
"logic_family": "74HC",
"function_code": "02",
"function_class": "Gate",
"function_name": "Quad 2-Input NOR Gate",
"manufacturer": null,
"is_specialty": false
},
"models_3d": [
{
"file": "74hc02m.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "74hc02m-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "9eb3189edfdeb91a6f2e55d258011f039e4fae10c760e11eb8cb46bfcfbe2a64",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "HGSEMI",
"Package": "SOIC-14",
"Category": "Logic",
"Pins": "14"
}
},
"variants": [
{
"mpn": "74HC02MM/TR",
"kind": "packaging"
},
{
"mpn": "74HC02MN",
"kind": "packaging"
},
{
"mpn": "74HC02MMT/TR",
"kind": "packaging"
},
{
"mpn": "74HC02MLQ/TR",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"74hc02m"
],
"discovery_pitch": "74HC02M (HGSEMI) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"74hc02m.kicad_sym",
"74hc02m.kicad_mod",
"74hc02m.glb",
"74hc02m.step",
"74hc02m.lbr",
"docs/hero.png",
"docs/74hc02m-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T14:49:39.163Z"
}