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74AHCT595T16-13

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Diodes Incorporated Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AHCT595T16-13

Diodes Incorporated · Shift Registers · TSSOP-16

74AHCT595T16-13 from Diodes Incorporated, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q1 tri_state Parallel data output 1 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
2 Q2 tri_state Parallel data output 2 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
3 Q3 tri_state Parallel data output 3 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
4 Q4 tri_state Parallel data output 4 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
5 Q5 tri_state Parallel data output 5 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
6 Q6 tri_state Parallel data output 6 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
7 Q7 tri_state Parallel data output 7 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
8 GND power_in Ground reference pin for the device.
9 Q7S output Serial data output carries the contents of the last shift register stage (Q6S shifted to Q7S) and is not affected by OE or MR.
10 MR input Active-low master reset input that clears the shift register to zero independently of the clocks when asserted low.
11 SHCP input Shift register clock input; data on DS is shifted into the first stage on each rising edge.
12 STCP input Storage register clock input; a rising edge transfers the shift register contents into the storage (output) register.
13 OE input Active-low output enable input; when held high the Q0-Q7 outputs are forced to the high-impedance state.
14 DS input Serial data input; inputs accept up to 5.5 V with Schmitt-trigger action and data is captured on the rising edge of the shift clock.
15 Q0 tri_state Parallel data output 0 is a 3-state output that becomes active when OE is asserted low and goes to high impedance when OE is high.
16 Vcc power_in Supply voltage pin; recommended operating range is 4.5 V to 5.5 V and absolute maximum is -0.5 V to +7.0 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSSOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: 74AHCT595T16-13
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74ahct595t16-13-etched.step / 74ahct595t16-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahct595t16-13.step / 74ahct595t16-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (10 pp, sha256 4dc912eff08d0048, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF