component
74AC86SCX
Public Made by Adomby adom
onsemi Logic Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
74ac86scx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
cd497b8
27d ago
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{
"schema_version": 1,
"type": "component",
"slug": "74ac86scx",
"title": "74AC86SCX",
"brief": "onsemi Logic Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"74ac86scx"
],
"component": {
"mpn": "74AC86SCX",
"manufacturer": "onsemi",
"package": "SOIC-14",
"pin_count": 14,
"category": "Logic",
"subcategory": "Logic Gates",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929185226641408",
"parts": {
"symbol": "74ac86scx.kicad_sym",
"footprint": "74ac86scx.kicad_mod",
"model_3d": "74ac86scx-etched.glb",
"model_3d_plain": "74ac86scx.glb",
"model_3d_step": "74ac86scx-etched.step",
"model_3d_step_plain": "74ac86scx.step",
"lbr": "74ac86scx.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "A0",
"type": "input",
"description": "Input A of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "2",
"name": "B0",
"type": "input",
"description": "Input B of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "3",
"name": "O0",
"type": "output",
"description": "Output of XOR gate 0 (O0 = A0 XOR B0). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V."
},
{
"number": "4",
"name": "A1",
"type": "input",
"description": "Input A of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "5",
"name": "B1",
"type": "input",
"description": "Input B of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "6",
"name": "O1",
"type": "output",
"description": "Output of XOR gate 1 (O1 = A1 XOR B1). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V). Connect to system ground; provides return path for supply and output currents."
},
{
"number": "8",
"name": "O3",
"type": "output",
"description": "Output of XOR gate 3 (O3 = A3 XOR B3). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V."
},
{
"number": "9",
"name": "B3",
"type": "input",
"description": "Input B of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "10",
"name": "A3",
"type": "input",
"description": "Input A of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "11",
"name": "O2",
"type": "output",
"description": "Output of XOR gate 2 (O2 = A2 XOR B2). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V."
},
{
"number": "12",
"name": "B2",
"type": "input",
"description": "Input B of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "13",
"name": "A2",
"type": "input",
"description": "Input A of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V."
},
{
"number": "14",
"name": "VCC",
"type": "power_in",
"description": "Positive supply voltage. Recommended operating range 2.0 V to 6.0 V; absolute maximum 7.0 V. Decouple with a 0.1 µF capacitor to GND close to the pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929185226641408",
"pages": 7,
"sha256": "5ef23fabf44a61f6",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "74AC86",
"logic_family": "74AC",
"function_code": "86",
"function_class": "Gate",
"function_name": "Quad 2-Input XOR Gate",
"manufacturer": null,
"is_specialty": false
},
"models_3d": [
{
"file": "74ac86scx.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "74ac86scx-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
8.7,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "decb1c4109980f0875899a9cb58b2b7ff9284b49db94dea686d8ef2ae53ddcc8",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "onsemi",
"Package": "SOIC-14",
"Category": "Logic",
"Pins": "14"
}
},
"variants": [
{
"mpn": "74AC86SCX",
"kind": "packaging"
},
{
"mpn": "74AC86SCXSJ",
"kind": "packaging"
},
{
"mpn": "74AC86SCXSJX",
"kind": "packaging"
},
{
"mpn": "74AC86SCXMTC",
"kind": "packaging"
},
{
"mpn": "74AC86SCXMTCX",
"kind": "packaging"
},
{
"mpn": "74AC86SCXPC",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"74ac86scx"
],
"discovery_pitch": "74AC86SCX (onsemi) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"74ac86scx.kicad_sym",
"74ac86scx.kicad_mod",
"74ac86scx.glb",
"74ac86scx.step",
"74ac86scx.lbr",
"docs/hero.png",
"docs/74ac86scx-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T14:43:12.000Z"
}