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74AC86SCX

Public Made by Adom

by adom

onsemi Logic Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs 74ac86scx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers 74ac86scx: viewers · Ray 1mo ago
74ac86scx-etched.fit.json 74ac86scx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74ac86scx-etched.glb 74ac86scx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74ac86scx-etched.step 74ac86scx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
74ac86scx.glb Publish 0.1.0 · Ray 1mo ago
74ac86scx.kicad_mod Publish 0.1.0 · Ray 1mo ago
74ac86scx.kicad_sym Publish 0.1.0 · Ray 1mo ago
74ac86scx.lbr Publish 0.1.0 · Ray 1mo ago
74ac86scx.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json 74ac86scx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 27d ago
README.md 74ac86scx: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

74AC86SCX

onsemi · Logic Gates · SOIC-14

74AC86SCX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Input A of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
2 B0 input Input B of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
3 O0 output Output of XOR gate 0 (O0 = A0 XOR B0). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V.
4 A1 input Input A of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
5 B1 input Input B of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
6 O1 output Output of XOR gate 1 (O1 = A1 XOR B1). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V.
7 GND power_in Ground reference (0 V). Connect to system ground; provides return path for supply and output currents.
8 O3 output Output of XOR gate 3 (O3 = A3 XOR B3). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V.
9 B3 input Input B of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
10 A3 input Input A of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
11 O2 output Output of XOR gate 2 (O2 = A2 XOR B2). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V.
12 B2 input Input B of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
13 A2 input Input A of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V.
14 VCC power_in Positive supply voltage. Recommended operating range 2.0 V to 6.0 V; absolute maximum 7.0 V. Decouple with a 0.1 µF capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • 74AC86SCX
  • 74AC86SCXSJ
  • 74AC86SCXSJX
  • 74AC86SCXMTC
  • 74AC86SCXMTCX
  • 74AC86SCXPC

CAD (KiCad official)

  • Symbol: 74AC86SCX
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: 74ac86scx-etched.step / 74ac86scx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ac86scx.step / 74ac86scx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 5ef23fabf44a61f6, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF