# 40N06

**UMW** · MOSFETs · TO-252

40N06 from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | GATE terminal of the 60V N-channel MOSFET; gate-source voltage is rated at ±20 V (VGS), and VGS(th) is 1 to 2.5 V. |
| 2 | D | passive | DRAIN terminal of the MOSFET, rated for VDS = 60 V and 40 A continuous drain current at TC = 25°C. |
| 3 | S | passive | SOURCE terminal of the MOSFET, the reference for the gate-source voltage (VGS rated ±20 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | 60 |  |  | V | VGS=0V, IDS=250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS=60V, VGS=0V | 2 |
| Gate-Body Leakage | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | 1 | 1.6 | 2.5 | V | VDS=VGS, IDS=250µA | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  |  | 14 | mΩ | VGS=10V, IDS=30A | 2 |
| Drain-Source On-State Resistance | RDS(ON) |  |  | 16 | mΩ | VGS=4.5V, IDS=20A | 2 |
| Drain-Source Voltage | VDS |  |  | 60 | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Drain Current-Continuous | ID |  |  | 40 | A | TC=25°C | 1 |
| Drain Current-Continuous | ID |  |  | 29 | A | TC=100°C | 1 |
| Drain Current-Pulsed | IDM |  |  | 160 | A | Note 1: repetitive rating, pulse width limited by maximum junction temperature | 1 |
| Avalanche Energy | EAS |  |  | 64 | mJ | Note 4: L=0.5mH, VDD=10V, VG=10V, VGATE=20V, Start TJ=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 75 | W | TC=25°C | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Operating Junction Temperature Range | TJ | -55 |  | 150 | °C |  | 1 |
| Thermal Resistance, Junction-to-Case | RθJC |  |  | 1.4 | °C/W |  | 2 |

## CAD (KiCad official)

- Symbol: `40N06`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `40n06-etched.step` / `40n06-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `40n06.step` / `40n06.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755875790913855488) (9 pp, sha256 `214235ff068ef732`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/40n06-datasheet.pdf)