component
24LC00T-I
Public Made by Adomby adom
Microchip Tech EEPROM, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| 24lc00t-i-etched.step | 2h ago |
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24LC00T-I
Microchip Tech · EEPROM · SOT-23-5
24LC00T-I from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | input | Serial clock input that synchronizes data transfer to and from the device, with Schmitt Trigger input and noise-spike filtering on the SCL and SDA inputs. |
| 2 | VSS | power_in | Ground reference for the device. |
| 3 | SDA | bidirectional | Open-drain serial address/data I/O that requires a pull-up resistor to VCC (typically 10 kΩ for 100 kHz, 2 kΩ for 400 kHz) and may change only while SCL is low for normal data transfer. |
| 4 | NC | unconnected | Not connected. |
| 5 | VCC | power_in | Power supply; the 24LC00 operates from 2.5 V to 5.5 V per the device selection table (the pin table gives +1.8 V to 5.5 V for the family). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-5 |
| Category | Memory |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (24LC00 device range) | VCC | 2.5 | 5.5 | V | 24LC00 device range per Device Selection Table | 1 | |
| Operating ambient temperature, Industrial (I) | TA | -40 | 85 | °C | Temp range I | 1 | |
| All inputs and outputs w.r.t. VSS | -0.6 | 1 | V | Max printed as VCC +1.0V | 2 | ||
| Storage temperature | -65 | 150 | °C | 2 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 2 | |||
| ESD protection on all pins | 4 | kV | 2 | ||||
| High-level input voltage, SCL and SDA | VIH | 0.7 | VCC | (Note) | 2 | ||
| Low-level input voltage, SCL and SDA | VIL | 0.3 | VCC | (Note) | 2 | ||
| Hysteresis of Schmitt Trigger inputs | VHYS | 0.05 | VCC | VCC ≥ 2.5V (Note) | 2 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 3.0 mA, VCC = 4.5V | 2 | ||
| Input leakage current | ILI | -1 | 1 | µA | VIN = VCC or VSS | 2 | |
| Output leakage current | ILO | -1 | 1 | µA | VOUT = VCC or VSS | 2 | |
| Pin capacitance (all inputs/outputs) | CIN, COUT | 10 | pF | VCC = 5.0V (Note); TA = 25°C, FCLK = 1 MHz | 2 | ||
| Operating current, write | ICC Write | 2 | mA | VCC = 5.5V, SCL = 400 kHz | 2 | ||
| Operating current, read | ICC Read | 1 | mA | VCC = 5.5V, SCL = 400 kHz | 2 | ||
| Standby current | ICCS | 1 | µA | VCC = 5.5V, SDA = SCL = VCC | 2 | ||
| Clock frequency | FCLK | 100 | kHz | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Clock frequency | FCLK | 400 | kHz | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Clock high time | THIGH | 4000 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Clock high time | THIGH | 600 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Clock low time | TLOW | 4700 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Clock low time | TLOW | 1300 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| SDA and SCL rise time | TR | 1000 | ns | 1.8V ≤ VCC ≤ 4.5V (Note 1) | 3 | ||
| SDA and SCL rise time | TR | 300 | ns | 4.5V ≤ VCC ≤ 5.5V (Note 1) | 3 | ||
| SDA and SCL fall time | TF | 300 | ns | (Note 1) | 3 | ||
| Start condition hold time | THD:STA | 4000 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Start condition hold time | THD:STA | 600 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Start condition setup time | TSU:STA | 4700 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Start condition setup time | TSU:STA | 600 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Data input hold time | THD:DAT | 0 | ns | (Note 2) | 3 | ||
| Data input setup time | TSU:DAT | 250 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Data input setup time | TSU:DAT | 100 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Stop condition setup time | TSU:STO | 4000 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Stop condition setup time | TSU:STO | 600 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Output valid from clock | TAA | 3500 | ns | 1.8V ≤ VCC ≤ 4.5V (Note 2) | 3 | ||
| Output valid from clock | TAA | 900 | ns | 4.5V ≤ VCC ≤ 5.5V (Note 2) | 3 | ||
| Bus free time | TBUF | 4700 | ns | 1.8V ≤ VCC ≤ 4.5V | 3 | ||
| Bus free time | TBUF | 1300 | ns | 4.5V ≤ VCC ≤ 5.5V | 3 | ||
| Output fall time from VIH minimum to VIL maximum | TOF | 250 | ns | (Note 1), CB ≤ 100 pF; min printed as 20+0.1CB | 3 | ||
| Input filter spike suppression (SDA and SCL pins) | TSP | 50 | ns | (Notes 1, 3) | 3 | ||
| Write cycle time | TWC | 4 | ms | 3 | |||
| Endurance | 1 | M cycles | (Note 4) | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Package: P = Plastic DIP (300 mil body), 8-lead SN = Plastic SOIC (3.90 mm body), 8-lead | 31 |
CAD (KiCad official)
- Symbol:
24LC00T-I - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
24lc00t-i-etched.step/24lc00t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);24lc00t-i.step/24lc00t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (34 pp, sha256
6e40fd9cafa0cec4, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).