component

24C64BN

Public Made by Adom

by adom

XBLW EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 24c64bn: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
24c64bn-etched.fit.json 24c64bn: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
24c64bn-etched.glb 24c64bn: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body wit… · Ray
24c64bn-etched.step 24c64bn: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body wit… · Ray
24c64bn-hero.glb 24c64bn: hero from the plain model · Ray
24c64bn-hero.overlay.json 24c64bn: hero from the plain model · Ray
24c64bn.glb Publish 0.1.0 · Ray
24c64bn.kicad_mod Publish 0.1.0 · Ray
24c64bn.kicad_sym Publish 0.1.0 · Ray
24c64bn.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
24c64bn.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md 24c64bn: manufacturer 'XBLW' (was 'XBLW 24C64BN XBLW': the MPN had been folded in) · Ray

24C64BN

XBLW · EEPROM · SOP-8

24C64BN from XBLW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Hard-wire to VIH or VIL to set the least-significant chip-select address bit; matched against the 5th address bit sent on the I2C bus. Internally pulled to VIL if left unconnected.
2 A1 input Device address input bit 1. Hard-wire to VIH or VIL to set the middle chip-select address bit; matched against the 6th address bit sent on the I2C bus. Internally recognized as VIL if left floating.
3 A2 input Device address input bit 2. Hard-wire to VIH or VIL to set the most-significant chip-select address bit; matched against the 7th address bit sent on the I2C bus. Internally recognized as VIL if left floating.
4 GND power_in Device ground reference (0 V). Common return for VCC and all logic signals.
5 SDA bidirectional I2C serial data line. Bi-directional, open-drain output - requires an external pull-up resistor to VCC and can be wire-OR'ed with other open-drain devices on the bus.
6 SCL input I2C serial clock input. Data on SDA is latched into the EEPROM on the rising edge; data is clocked out on the falling edge. Rated 400 kHz at 1.8 V and up to 1 MHz at 2.5-5.5 V.
7 WP input Hardware write-protect input. Tie to VIL (or leave unconnected) to allow programming of the EEPROM array; tie to VIH / VCC to disable all program/erase operations. Read operations are unaffected by WP state.
8 VCC power_in Positive supply input. Operating range 1.8 V to 5.5 V; absolute maximum 8 V. Bypass to GND with a local 100 nF ceramic capacitor.

Key specifications

Parameter Value
Manufacturer XBLW
Package SOP-8
Category Memory
Pins 8

Ordering variants

  • 24C64BN
  • 24C64BNN
  • 24C64BNMN
  • 24C64BNTN
  • 24C64BNDN
  • 24C64BND6
  • 24C64BNS

CAD (KiCad official)

  • Symbol: 24C64BN
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: 24c64bn-etched.step / 24c64bn-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24c64bn.step / 24c64bn.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
24c64bn.step 122 KB You want the bare part, or you mark your own boards.
24c64bn-etched.step 1.6 MB You want the part with 24C64BN already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 411 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (18 pp, sha256 c0329401d1e9b2e0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF