component
24C01BN
Public Made by Adomby adom
XBLW EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
Publish 0.2.1
4a43978
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{
"schema_version": 1,
"type": "component",
"slug": "24c01bn",
"title": "24C01BN",
"brief": "XBLW EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.1",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"memory",
"24c01bn"
],
"component": {
"mpn": "24C01BN",
"manufacturer": "XBLW",
"package": "SOP-8",
"pin_count": 8,
"category": "Memory",
"subcategory": "EEPROM",
"datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2310191805_XBLW-24C01BN-XBLW_C18723541.pdf",
"parts": {
"symbol": "24c01bn.kicad_sym",
"footprint": "24c01bn.kicad_mod",
"model_3d": "24c01bn-hero.glb",
"model_3d_plain": "24c01bn.glb",
"model_3d_step": "24c01bn-etched.step",
"model_3d_step_plain": "24c01bn.step",
"lbr": "24c01bn.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "A0",
"type": "input",
"description": "Device address input bit 0. Hardwire to VIH or VIL to set the chip's slave address; if left unconnected it is internally recognized as VIL, but a 10 kΩ or smaller pull-up/pull-down to a known state is recommended to avoid capacitive coupling."
},
{
"number": "2",
"name": "A1",
"type": "input",
"description": "Device address input bit 1. Hardwire to VIH or VIL to set the chip's slave address; internally pulled to VIL if left floating, 10 kΩ or smaller pull-up/pull-down recommended."
},
{
"number": "3",
"name": "A2",
"type": "input",
"description": "Device address input bit 2. Hardwire to VIH or VIL to set the chip's slave address; internally pulled to VIL if left floating, 10 kΩ or smaller pull-up/pull-down recommended."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "5",
"name": "SDA",
"type": "bidirectional",
"description": "Serial data input / open-drain output for the 2-wire (I2C-compatible) bus. Requires an external pull-up resistor; can be wire-OR'd with other open-drain devices on the same bus."
},
{
"number": "6",
"name": "SCL",
"type": "input",
"description": "Serial clock input for the 2-wire (I2C-compatible) bus. Rising edge latches data into the EEPROM; falling edge clocks data out. Supports up to 1 MHz at 2.5-5V or 400 kHz at 1.8V."
},
{
"number": "7",
"name": "WP",
"type": "input",
"description": "Write-protect input. Tie to VIH or Vcc to disable all programming operations (read still works); tie to VIL to allow writes. Internally recognized as VIL if unconnected; 10 kΩ or smaller pull to a known state recommended."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Positive supply, 1.8 V to 5.5 V. Standard 100 nF decoupling to GND recommended near the pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2310191805_XBLW-24C01BN-XBLW_C18723541.pdf",
"pages": 20,
"sha256": "6d6af116da82cd71",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "24c01bn.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "24c01bn-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "dc80011f4d78528e17d729c48c915d8d927812691cc4611b7e85ae74ec3d7bce",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "XBLW",
"Package": "SOP-8",
"Category": "Memory",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"24c01bn"
],
"discovery_pitch": "24C01BN (XBLW) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"24c01bn.kicad_sym",
"24c01bn.kicad_mod",
"24c01bn.glb",
"24c01bn.step",
"24c01bn-etched.step",
"24c01bn.lbr",
"docs/hero.png",
"docs/24c01bn-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"pads.json",
"24c01bn-hero.glb",
"24c01bn-hero.overlay.json"
],
"visibility": "public",
"updated_at": "2026-09-24T14:30:13.790Z",
"description": "XBLW EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
"org": "adom"
}