Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

ZTP7195C

ZILLTEK · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-6

ZTP7195C from ZILLTEK, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB input Feedback input. Senses the output voltage via an external resistive divider to regulate VOUT. Feedback reference threshold is 0.6V; over-voltage comparator trips at ~0.72V (20% above nominal).
2 EN input Enable input. Digital input turning the regulator on (drive high, ≥1.5V rising threshold) or off (drive low, ≤0.4V falling threshold). Pull up with 100kΩ resistor for automatic startup. Absolute max −0.3V to +19V.
3 GND power_in Ground return for the IC and power stage. Connect to a large copper area for thermal performance.
4 IN power_in Power input, 4.5V to 18V (absolute max +19V). Supplies both the internal IC and the step-down converter switches. Bypass to GND with a low-ESR ceramic capacitor placed close to the pin.
5 SW output Power switching node connecting the internal high-side (70mΩ) and low-side (30mΩ) N-MOSFETs. Drives the external LC filter to the output load. Absolute max −0.3V to VIN+0.3V (−5V for <10ns transient).
6 BOOT passive High-side gate drive boost input. Connect a 0.1μF (or larger) bootstrap capacitor from SW to BOOT to provide gate drive above VIN for the high-side N-MOSFET. Absolute max VSW−0.3V to VSW+6V.

Key specifications

Parameter Value
Manufacturer ZILLTEK
Package SOT-23-6
Category PMIC
Pins 6

CAD (KiCad official)

  • Symbol: ZTP7195C
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ztp7195c.step 97 KB You want the bare part, or you mark your own boards.
ztp7195c-etched.step 1.4 MB You want the part with ZTP7195C already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 356 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZILLTEK datasheet (8 pp, sha256 dbced3af56b121ea, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF