YT8531H-CA from Motorcomm, in a QFN-40(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TRXP0	bidirectional	Media-dependent interface pair 0, positive. 100Ω differential transmission line for MDI pair A.
2	TRXN0	bidirectional	Media-dependent interface pair 0, negative. 100Ω differential transmission line for MDI pair A.
3	AVDDL	power_in	Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor.
4	TRXP1	bidirectional	Media-dependent interface pair 1, positive. 100Ω differential transmission line for MDI pair B.
5	TRXN1	bidirectional	Media-dependent interface pair 1, negative. 100Ω differential transmission line for MDI pair B.
6	TRXP2	bidirectional	Media-dependent interface pair 2, positive. 100Ω differential transmission line for MDI pair C.
7	TRXN2	bidirectional	Media-dependent interface pair 2, negative. 100Ω differential transmission line for MDI pair C.
8	AVDDL	power_in	Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor.
9	TRXP3	bidirectional	Media-dependent interface pair 3, positive. 100Ω differential transmission line for MDI pair D.
10	TRXN3	bidirectional	Media-dependent interface pair 3, negative. 100Ω differential transmission line for MDI pair D.
11	AVDD33	power_in	Analog 3.3V power supply for the PHY analog front end.
12	RESET_N	input	Hardware reset, active low. Requires an external pull-up resistor; internal pull-up.
13	MDC	input	MDIO Management Data Clock input from MAC. Internal pull-down.
14	MDIO	bidirectional	MDIO Management Data I/O. Bidirectional; pull up to 3.3V/2.5V/1.8V matching I/O voltage. Internal pull-up.
15	TXD3	input	RGMII transmit data bit 3 from MAC to PHY. Internal pull-down.
16	TXD2	input	RGMII transmit data bit 2 from MAC to PHY. Internal pull-down.
17	TXD1	input	RGMII transmit data bit 1 from MAC to PHY. Internal pull-down.
18	TXD0	input	RGMII transmit data bit 0 from MAC to PHY. Internal pull-down.
19	TX_CTL	input	RGMII transmit control signal from the MAC. Internal pull-down.
20	TX_CLK	input	RGMII transmit reference clock from MAC (125/25/2.5 MHz depending on speed). Internal pull-down.
21	DVDDL	power_in	Digital core power supply, 1.1V/1.2V.
22	RXD3/PHYAD0	output	RGMII receive data bit 3 output to MAC. Latched at power-up as PHY address bit 0 (PHYAD0); internal pull-down default sets bit low.
23	RXD2/PLLOFF	output	RGMII receive data bit 2 output. Latched at power-up as PLLOFF strap (sleep-mode PLL off configuration). Internal pull-down.
24	RXD1/TXDLY	output	RGMII receive data bit 1 output. Latched at power-up as TXDLY strap; pull-up adds RGMII TXC delay for TXD latching. Internal pull-down.
25	RXD0/RXDLY	output	RGMII receive data bit 0 output. Latched at power-up as RXDLY strap; pull-up adds 2ns delay on RX_CLK at 125MHz or 8ns at 25/2.5MHz. Internal pull-up.
26	RX_CTL/PHYAD2	output	RGMII receive control signal to MAC. Latched at power-up as PHY address bit 2 (PHYAD2). Internal pull-down.
27	RX_CLK/PHYAD1	output	RGMII continuous receive reference clock (125/25/2.5 MHz) derived from received data. Latched at power-up as PHY address bit 1 (PHYAD1). Internal pull-down.
28	DVDD_RGMII	power_in	Digital I/O supply for RGMII, MDC, and MDIO pads. Voltage set by CFG_EXT and CFG_LDO[1:0]; supplied externally or from internal LDO. Requires bulk plus decoupling capacitor regardless of source.
29	DVDD33	power_in	3.3V digital supply for non-RGMII I/O pads.
30	REG_O	power_out	Internal switch-mode regulator 1.1V output for the YT8531H variant. Connect directly to an external 2.2 uH power inductor. (This pin is LDO_O on YT8531DH/DC and NC on YT8531P.)
31	INT_N/PME_N	output	Open-drain interrupt output (default INT_N, active low). Optionally reassigned as PME_N (Power Management Event, active low on magic-packet reception) via EXT 0xA00A bit[6]. Requires 3.3V external pull-up; leave floating if unused.
32	LED0/CFG_EXT	output	LED0 driver (light = 10 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_EXT strap selecting I/O pad power source (pull-up = external, pull-down = internal LDO). Internal pull-up.
33	LED1/CFG_LDO0	output	LED1 driver (light = 100 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_LDO0, sets I/O pad LDO output voltage or external input voltage together with CFG_LDO1. Internal pull-up.
34	LED2/CFG_LDO1	output	LED2 driver (light = 1000 Mbps link up, blink = TX/RX activity). Latched at power-up as CFG_LDO1, sets I/O pad LDO output voltage or external input voltage together with CFG_LDO0. Internal pull-down.
35	CLKOUT	output	Reference clock output from internal PLL: 25 MHz reference clock or UTP-recovery receive clock for Synchronous Ethernet. Leave floating if unused by the MAC.
36	XTAL_I	input	25 MHz crystal input pin. When using an external clock/oscillator driven into XTAL_O, short XTAL_I to GND; when driving a clock into XTAL_I, leave XTAL_O floating.
37	XTAL_O	output	25 MHz crystal output pin. When using an external clock into XTAL_I, leave XTAL_O floating; when driving external source into XTAL_O, short XTAL_I to GND.
38	AVDDL	power_in	Analog power supply, 1.1V/1.2V. Bypass locally with a decoupling capacitor.
39	RBIAS	passive	Bias current reference. Requires an external 2.49 kΩ ±1% resistor to GND.
40	AVDD33	power_in	Analog 3.3V power supply for the PHY analog front end.
41	GND	power_in	Exposed thermal/ground pad on the QFN underside. Must be soldered to the PCB ground plane for both electrical ground and thermal dissipation.

Key specifications

Parameter	Value
Manufacturer	Motorcomm
Package	QFN-40(5x5)
Category	Interface
Pins	41

Ordering variants

Same part, different packaging or reel option.

YT8531H-CA
YT8531C-CA
YT8531DH-CA
YT8531DC-CA
YT8531P-CA

CAD (KiCad official)

Symbol: YT8531H-CA
Footprint: Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
3D model: QFN-40(5x5) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Motorcomm datasheet (66 pp, sha256 fa0145e682bbdfad, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF