component
YT8510C
Public Unreviewedby Ray
Motorcomm Ethernet Transceivers, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownYT8510C
Motorcomm · Ethernet Transceivers · QFN-40-EP(6x6)
YT8510C from Motorcomm, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MDC | input | Management Data Clock input (Schmitt trigger). Clocks MDIO transactions to the MII register set; only required during MDIO operation. |
| 2 | OVDD | power_in | 2.5V or 3.3V supply for digital I/O pads (MII/RMII/RGMII, RESET, MDIO, LED/INT). In 3.3V mode connect to 3.3V; in 2.5V mode the internal LDO drives this pin as a 2.5V output that feeds OVDD_RMII/OVDD_RGMII. |
| 3 | NC | unconnected | No connect. |
| 4 | AVDDL_O | power_out | Internal LDO 1.2V output that supplies all AVDDL analog domains. Bypass to GND and tie to AVDDL_PLL/AVDDL_RX. |
| 5 | LED_N/INT_N | output | Dual-function LED / active-low interrupt open-drain output. Default active-low LED indication; MDIO-programmable to function as INT_N. |
| 6 | XTAL_OUT | output | 25 MHz crystal oscillator output. Connect a 25 MHz crystal between XTAL_IN and XTAL_OUT with loading capacitors to GND; leave unconnected when driving XTAL_IN with an external oscillator. |
| 7 | XTAL_IN | input | 25 MHz crystal oscillator input. Accepts one leg of a 25 MHz crystal or a CMOS-level 25 MHz reference clock. |
| 8 | VDD33_MAIN | power_in | 3.3V supply for the main core. |
| 9 | RBIAS | passive | Bias resistor pin. Connect a 2.4kΩ ±1% resistor from RBIAS to GND to set the internal current reference. |
| 10 | AVDDL_PLL | power_in | 1.2V analog supply for the PLL. Typically driven by AVDDL_O. |
| 11 | AVDDL_RX | power_in | 1.2V analog supply for the receiver. Typically driven by AVDDL_O. |
| 12 | VDD33_DAC | power_in | 3.3V supply for the transmit DAC / line driver. |
| 13 | TXP0 | bidirectional | Channel-0 differential MDI positive (TRD0+). Voltage-driven DAC with integrated 50Ω termination; no center-tap supply required. |
| 14 | TXN0 | bidirectional | Channel-0 differential MDI negative (TRD0−). Voltage-driven DAC with integrated 50Ω termination. |
| 15 | TXP1 | bidirectional | Channel-1 differential MDI positive (TRD1+). Voltage-driven DAC with integrated 50Ω termination; no center-tap supply required. |
| 16 | TXN1 | bidirectional | Channel-1 differential MDI negative (TRD1−). Voltage-driven DAC with integrated 50Ω termination. |
| 17 | Reserved | input | Reserved for internal use with internal pull-down. Recommend to leave floating. |
| 18 | VDD33_AUX | power_in | 3.3V auxiliary supply for the passive signal-detect circuitry. Can be tied directly to VDD33_MAIN. |
| 19 | Reserved | output | Reserved output for internal use. Recommend to leave floating. |
| 20 | Reserved | input | Reserved for internal use with internal pull-down. Recommend pulling up to OVDD through a 4.7kΩ resistor. |
| 21 | RX_DV/Strapping[4] | bidirectional | Receive Data Valid (active-high): asserted while a receive frame is in progress and the RXD outputs carry valid data. Sampled on reset as power-on strapping bit [4]. |
| 22 | NC | unconnected | No connect - keep floating. |
| 23 | RXD[3]/Strapping[3] | bidirectional | Receive Data output bit 3 (MSB), synchronous to RXC. Sampled on reset as power-on strapping bit [3]. |
| 24 | RXD[2]/Strapping[2] | bidirectional | Receive Data output bit 2, synchronous to RXC. Sampled on reset as power-on strapping bit [2]. |
| 25 | OVDD_RGMII | power_in | 2.5V or 3.3V supply for the RGMII I/O bank. Internally shorted with OVDD_RMII. |
| 26 | RXD[1]/Strapping[1] | bidirectional | Receive Data output bit 1, synchronous to RXC. Sampled on reset as power-on strapping bit [1]. |
| 27 | RXD[0]/Strapping[0] | bidirectional | Receive Data output bit 0 (LSB), synchronous to RXC. Sampled on reset as power-on strapping bit [0]. |
| 28 | RXC | bidirectional | Receive Clock, 2.5/25 MHz output or input used to synchronize the RXD[3:0] outputs. Direction and frequency depend on selected MII/RMII/RGMII mode and link speed. Internal pull-up. |
| 29 | OVDD_RMII | power_in | 2.5V or 3.3V supply for the RMII I/O bank. Internally shorted with OVDD_RGMII. |
| 30 | TX_EN | input | Transmit Enable, active-high (Schmitt trigger). When asserted, data on TXD[3:0] is encoded and transmitted onto the MDI. |
| 31 | TXD[3] | input | Transmit Data input bit 3 (MSB), sampled synchronously to TXC. Internal pull-down. |
| 32 | TXD[2] | input | Transmit Data input bit 2, sampled synchronously to TXC. Internal pull-down. |
| 33 | TXD[1] | input | Transmit Data input bit 1, sampled synchronously to TXC. Internal pull-down. |
| 34 | TXD[0] | input | Transmit Data input bit 0 (LSB), sampled synchronously to TXC. Internal pull-down. |
| 35 | TXC | bidirectional | Transmit Clock, 2.5/25/50 MHz output or input used to synchronize TXD[3:0]. Direction and frequency depend on selected MII/RMII/RGMII mode and link speed. |
| 36 | DVDDL | power_in | 1.2V supply input for the digital core. |
| 37 | SYNC_IO | bidirectional | IEEE 802.1AS frame-sync event / sync-pulse, configurable as input or output. Internal pull-down. |
| 38 | SYNC_IN | input | IEEE 802.1AS frame-sync event / sync-pulse input (Schmitt trigger). |
| 39 | RESET_N | input | Active-low chip reset with internal pull-up. Assert low to reset the PHY; strapping pins are latched on the rising edge. |
| 40 | MDIO | bidirectional | Management Data I/O. Serial bidirectional line used to read/write the MII register set; latched on the rising edge of MDC. Requires an external pull-up (typ. to OVDD). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Motorcomm |
| Package | QFN-40-EP(6x6) |
| Category | Interface |
| Pins | 40 |
CAD (KiCad official)
- Symbol:
YT8510C - Footprint:
Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm - 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
yt8510c.step |
538 KB | You want the bare part, or you mark your own boards. |
yt8510c-etched.step |
2.3 MB | You want the part with YT8510C already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 589 faces against 314 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Motorcomm datasheet (81 pp, sha256
4c6799172ff052d9, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).