component
XL7046E1
Public Unreviewedby Ray
XLSEMI DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXL7046E1
XLSEMI · DC-DC Converters · ESOP-8
XL7046E1 from XLSEMI, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CSN | input | Current Sense Negative terminal. Connects to the load-side of the external current-sense resistor R3 (typ. 0.075 Ω for VOUT ≤ 5V, 0.082 Ω for VOUT > 5V) for the internal over-current comparator (OCS). |
| 2 | CSP | input | Current Sense Positive terminal. Connects to the SW-side of the external current-sense resistor R3 and pairs with CSN to feed the internal over-current sense amplifier (75 mV threshold). |
| 3 | VC | passive | Internal Voltage Regulator Bypass Capacity. In a typical application, VC connects a 1 µF bypass capacitor to VIN to decouple the internal LDO that powers control circuitry. |
| 4 | VIN | power_in | Supply Voltage Input Pin. Operates from 8V to 80V DC (absolute max 90V). Bypass VIN to GND with a suitably large capacitor (e.g. 47 µF/100V) to eliminate input noise; VIN UVLO ≈ 6V. |
| 5 | SW | output | Power Switch Output pin. Drain of the internal HV P-channel MOSFET (Rds(on) typ. 270 mΩ) that supplies the inductor/Schottky node. SW is also connected to the Exposed PAD for thermal dissipation. |
| 6 | EN | input | Enable pin, TTL-compatible. Drive EN high (>2V) to turn the device OFF, drive it low (<1V) or tie to GND to enable the regulator. Floating defaults low (enabled). Abs max 20V. |
| 7 | GND | power_in | Ground pin. Must be placed outside the Schottky-diode-to-output-capacitor ground path so switching current spikes do not induce voltage noise into the XL7046. |
| 8 | FB | input | Feedback pin. Through an external resistor divider, FB senses the output voltage and regulates it against the internal 1.25V reference (VOUT = 1.25 × (1 + R2/R1)). |
| 9 | EP | output | Exposed thermal PAD on the bottom of the SOP8-EP package. Electrically connected to SW (switch node) per the datasheet, not to GND. Solder to a copper pour tied to the SW net for thermal relief. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XLSEMI |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
XL7046E1
CAD (KiCad official)
- Symbol:
XL7046E1 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XLSEMI datasheet (12 pp, sha256
bfa135c6ec9c4c7a, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).