Symbol & Footprint

Schematic Symbol

Open full view ↗

PCB Footprint

Open full view ↗
Contents

README

markdown

XL3001E1

XLSEMI · LED Drivers · SOIC-8-EP

XL3001E1 from XLSEMI, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Output current-sense input. Regulated to an internal 0.21 V reference (IOUT = 0.21 V / RCS). Connect to the high side of the current-sense resistor to set LED current.
2 NC unconnected No connection. Leave floating or tie to any convenient net; the pin is not internally bonded.
3 VC passive Internal voltage-regulator bypass pin. Connect a 1 µF ceramic capacitor between VIN and VC in typical applications for internal LDO decoupling.
4 VIN power_in Power supply input, 8 V to 40 V DC (absolute max 45 V). Bypass VIN to GND with an electrolytic capacitor (e.g. 100 µF/50 V) plus a ceramic to suppress switching noise.
5 SW output Power switching output (drain of internal high-side power MOSFET). Connect to the buck inductor / catch diode node; rated for up to 3 A switching current at 220 kHz. Electrically tied to the exposed metal pad on the package back.
6 SW output Power switching output (drain of internal high-side power MOSFET). Tie to pin 5 and to the exposed pad; carries the buck switch-node current.
7 GND power_in Device ground. Tie to pin 8 and to the PCB ground plane; return path for VIN bypass and CS sense resistor.
8 GND power_in Device ground. Tie to pin 7 and to the PCB ground plane.
9 EP/SW output Exposed thermal pad on the back of the SOP8-EP package. Electrically the SW node (the datasheet notes '背部焊盘为 SW'). Solder to the SW copper pour to conduct switch-node current and heat.

Key specifications

Parameter Value
Manufacturer XLSEMI
Package SOIC-8-EP
Category LED-drv
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • XL3001E1

CAD (KiCad official)

  • Symbol: XL3001E1
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
xl3001e1.step 193 KB You want the bare part, or you mark your own boards.
xl3001e1-etched.step 1.3 MB You want the part with XL3001E1 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 353 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XLSEMI datasheet (13 pp, sha256 7ac593a3adc03e11, retrieved 2026-08-17, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF