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XL2515QF20

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by Ray

XINLUDA CAN ICs, QFN-20-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentcomm-uartxl2515qf20
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Datasheet

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Contents

README

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XL2515QF20

XINLUDA · CAN ICs · QFN-20-EP(4x4)

XL2515QF20 from XINLUDA, in a QFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKOUT/SOF output Clock output pin with programmable prescaler. Alternate function: Start-of-Frame (SOF) signal for time-slot protocols or bus diagnostics.
2 TX0RTS input Transmit buffer TXB0 Request-to-Send input, 100 k internal pull-up to VDD. Alternate function: general purpose digital input.
3 TX1RTS input Transmit buffer TXB1 Request-to-Send input, 100 k internal pull-up to VDD. Alternate function: general purpose digital input.
4 NC unconnected No internal connection.
5 TX2RTS input Transmit buffer TXB2 Request-to-Send input, 100 k internal pull-up to VDD. Alternate function: general purpose digital input.
6 OSC2 output Crystal oscillator output.
7 OSC1 input Crystal oscillator input; may also be driven by an external clock source.
8 GND power_in Ground reference (VSS) for logic and I/O pins.
9 RX1BF output Receive buffer RXB1 interrupt pin or general purpose digital output.
10 RX0BF output Receive buffer RXB0 interrupt pin or general purpose digital output.
11 INT output Active-low interrupt output pin (open-drain style); asserted by any enabled interrupt source in CANINTF.
12 SCK input SPI clock input. Supports modes 0,0 and 1,1 up to 10 MHz.
13 NC unconnected No internal connection.
14 SI input SPI data input (MOSI from host).
15 SO output SPI data output (MISO to host).
16 CS input Active-low SPI chip select input; must be held low for the duration of each SPI transaction.
17 RESET input Active-low device reset input; resets internal registers and enters Configuration mode.
18 VDD power_in Positive supply for logic and I/O pins, 2.7 V to 5.5 V.
19 TXCAN output Transmit output pin to CAN bus transceiver.
20 RXCAN input Receive input pin from CAN bus transceiver.
21 EP power_in Exposed thermal pad on the underside of the QFN package. Must be soldered and connected to VSS (GND) for proper electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package QFN-20-EP(4x4)
Category Comm/UART
Pins 21

Ordering variants

Same part, different packaging or reel option.

  • XL2515QF20
  • XL2515QF20TSS
  • XL2515QF20DIP
  • XL2515QF20SO

CAD (KiCad official)

  • Symbol: XL2515QF20
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20-EP(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (21 pp, sha256 1bbf011785200215, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF