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XD8870

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by Ray

XINLUDA Telecom Interface ICs, DIP-18. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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XD8870

XINLUDA · Telecom Interface ICs · DIP-18

XD8870 from XINLUDA, in a DIP-18. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN+ input Non-inverting op-amp input. Analog input to the internal differential front-end amplifier used to condition the incoming DTMF signal.
2 IN- input Inverting op-amp input. Analog input to the internal differential front-end amplifier; combined with IN+ to form the differential DTMF signal input.
3 GS output Gain Select. Output of the front-end differential amplifier; connect a feedback resistor from GS to IN- to set the input gain (Av = R5/R1 in the differential configuration).
4 VRef output Reference Voltage output. Nominally VDD/2, used to bias the input amplifier at mid-rail in single-ended and differential input configurations.
5 INH input Inhibit input. Logic high inhibits detection of tones representing characters A, B, C and D. Internally pulled down.
6 PWDN input Power-Down input. Active-high; powers down the device and inhibits the oscillator to minimize standby current. Internally pulled down.
7 OSC1 input Crystal oscillator input. Connect a 3.579545 MHz crystal between OSC1 and OSC2 to complete the internal oscillator circuit.
8 OSC2 output Crystal oscillator output. Companion to OSC1; a 3.579545 MHz crystal between the two pins completes the internal oscillator.
9 VSS power_in Ground reference (0 V typical). All internal circuitry is referenced to this pin.
10 TOE input Three-State Output Enable input. Logic high enables the Q1-Q4 data outputs; logic low forces them to high-impedance. Internally pulled up.
11 Q1 tri_state Three-state data output bit 1 (LSB) of the 4-bit decoded tone-pair code. High-impedance when TOE is low.
12 Q2 tri_state Three-state data output bit 2 of the 4-bit decoded tone-pair code. High-impedance when TOE is low.
13 Q3 tri_state Three-state data output bit 3 of the 4-bit decoded tone-pair code. High-impedance when TOE is low.
14 Q4 tri_state Three-state data output bit 4 (MSB) of the 4-bit decoded tone-pair code. High-impedance when TOE is low.
15 StD output Delayed Steering output. Goes high when a received tone-pair has been registered and the output latch has been updated; returns low when the voltage on St/GT falls below VTSt.
16 ESt output Early Steering output. Presents a logic high once the digital algorithm has detected a valid tone pair (signal condition); returns low on loss of signal condition.
17 St/GT bidirectional Steering Input / Guard Time output. A voltage greater than VTSt registers the detected tone pair and updates the output latch; a voltage less than VTSt frees the device to accept a new tone pair. The GT output side resets the external steering RC time constant, and its state is a function of ESt and the voltage on St.
18 VDD power_in Positive power supply input. +5 V typical; operating range 2.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer XINLUDA
Package DIP-18
Category Interface
Pins 18

Ordering variants

Same part, different packaging or reel option.

  • XD8870
  • XD8870XL8870

CAD (KiCad official)

  • Symbol: XD8870
  • Footprint: Package_DIP:DIP-18_W7.62mm
  • 3D model: DIP-18 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XINLUDA datasheet (18 pp, sha256 cd78ec98c9febbc5, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF