component
XD74LS93
Public Unreviewedby Ray
XINLUDA Counters, Dividers, DIP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownXD74LS93
XINLUDA · Counters, Dividers · DIP-14
XD74LS93 from XINLUDA, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CKB | input | Clock B input to the divide-by-8 (three-stage) counter section, active on the high-to-low (falling) edge. Drives QB, QC, QD outputs when used stand-alone, or the full 4-bit ripple chain when tied to QA. |
| 2 | R0(1) | input | Asynchronous master reset input 1. When both R0(1) and R0(2) are HIGH, all four counter outputs (QA, QB, QC, QD) are forced LOW regardless of the clock inputs. |
| 3 | R0(2) | input | Asynchronous master reset input 2. Both R0(1) and R0(2) must be HIGH simultaneously to clear the counter; if either is LOW, normal counting proceeds. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie as convenient for layout. |
| 5 | VCC | power_in | Positive supply voltage input. Recommended operating range 4.75 V to 5.25 V (5 V nominal); absolute maximum 7 V. Decouple with a 0.1 µF ceramic capacitor close to the pin. |
| 6 | NC | unconnected | No internal connection. |
| 7 | NC | unconnected | No internal connection. |
| 8 | QC | output | Counter output QC - third stage (bit 2, weight 4) of the divide-by-8 ripple section. Toggles on the falling edge of QB. |
| 9 | QB | output | Counter output QB - second stage (bit 1, weight 2) of the divide-by-8 ripple section. Toggles on the falling edge of the CKB input. |
| 10 | GND | power_in | Ground / 0 V reference for the device. Connect to system ground with a low-impedance path. |
| 11 | QD | output | Counter output QD - fourth stage (bit 3, weight 8, MSB) of the divide-by-8 ripple section. Toggles on the falling edge of QC. |
| 12 | QA | output | Counter output QA - output of the divide-by-2 flip-flop clocked by CKA. Tie to CKB (pin 1) externally to form a full 4-bit MOD-16 binary counter. |
| 13 | NC | unconnected | No internal connection. |
| 14 | CKA | input | Clock A input to the independent divide-by-2 flip-flop, active on the high-to-low (falling) edge. Drives QA output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XINLUDA |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
XD74LS93NXD74LS93PCXD74LS93DXD74LS93M
CAD (KiCad official)
- Symbol:
XD74LS93 - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XINLUDA datasheet (8 pp, sha256
d9adfc947b748a32, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).