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VRR1202LSX

AnaSem · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-25

VRR1202LSX from AnaSem, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Voltage input. Operating range 1.6V to 6.0V (absolute max −0.3V to +7.0V). A 1.0 µF ceramic input capacitor (CIN) between VIN and VSS is recommended for stable input power.
2 VSS power_in Power ground reference. Common return for VIN, VOUT, and EN.
3 EN input Chip enable input. VENH ≥ 1.2V (up to 6.0V) enables the regulator; VENL ≤ 0.3V (EN = VSS) puts the device into shutdown, disables the P-channel pass MOSFET, and activates the CL auto-discharge (RDIS ≈ 160Ω) to rapidly pull VOUT down to VSS. Internal ~4 MΩ pull-down present.
4 NC unconnected No internal connection (open). Leave floating or tie to VSS at user discretion.
5 VOUT power_out Regulated output, 1.2V ±1% (VRR1202LSX). Delivers up to 250 mA (current limit typ. 300 mA, short-circuit typ. 40 mA). Requires a ≥1.0 µF low-ESR ceramic output capacitor (CL) between VOUT and VSS placed close to the pin for phase compensation. Must not exceed VIN + 0.3V (parasitic diode to VIN).

Key specifications

Parameter Value
Manufacturer AnaSem
Package SOT-25
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • VRR1202LSX

CAD (KiCad official)

  • Symbol: VRR1202LSX
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-25 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: AnaSem datasheet (29 pp, sha256 9185c7030a87d3ad, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF