Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

UCC28600DR

Texas Instruments · AC-DC Controllers and Regulators · SOIC-8

UCC28600DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SS input Soft-start programming pin. Program the soft-start rate with a capacitor to GND; rate is set by capacitance and the internal soft-start charge current. Faults discharge SS to GND through an internal MOSFET (R_DS(on) ≈ 100 Ω). Modulator reacts to the lowest of SS, internal FB voltage, and peak current limit.
2 FB input Feedback input or control input from optocoupler to the PWM comparator, controls peak MOSFET current. Internal 20-kΩ pull-up resistor to internal 5-V reference. Voltage on FB selects one of three operating modes: quasi-resonant (QR), frequency foldback (FFM) or green mode (GM).
3 CS input Current sense input; also programs power limit and provides overcurrent protection. Sensed across an external current-sense resistor to GND. Power limit is set with an effective series resistance between this pin and the sense resistor.
4 GND power_in Ground for internal circuitry. Connect a ceramic 0.1-µF bypass capacitor between VDD and GND, placed as close to these two pins as possible.
5 OUT output 1-A sink / 0.75-A source TrueDrive gate-drive output. Drives the power MOSFET and switches between GND and the lower of VDD or the internal 13-V output clamp.
6 VDD power_in Supply input (recommended 21 V max operating, 32 V absolute max). Use a 0.1-µF ceramic bypass capacitor to GND for HF filtering; operating energy is delivered from an auxiliary winding. A larger bulk storage capacitor is also required between VDD and GND to prevent hiccup during start-up.
7 OVP input Over-voltage protection input. Senses line-OVP, load-OVP and the resonant trough for QR turn-on using the primary bias winding of the transformer. Sensitivity is adjusted with external resistors connected to this pin. Absolute range -1.0 V to +6.0 V.
8 STATUS output ACTIVE HIGH open-drain signal indicating the device has entered standby (green) mode; can be used to disable a PFC stage (high-impedance = green mode). STATUS is high during UVLO (VDD < start-up threshold) and during softstart (SS < FB). Rated up to 30 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • UCC28600DR
  • UCC28600DRD

CAD (KiCad official)

  • Symbol: UCC28600DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 c8acca4e3e835fd9, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF