component
ucc2818adr
Public Unreviewedby Ray
Texas Instruments AC-DC Controllers and Regulators, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownUCC2818ADR
Texas Instruments · AC-DC Controllers and Regulators · SOIC-16
UCC2818ADR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Device ground and signal return. All internal references and bypass capacitors are referred to this pin. |
| 2 | PKLMT | input | PFC peak current limit input. Compared against an internal 0 V reference (±15 mV); when the pin is driven negative by the sense resistor beyond threshold, the PWM latch is reset with ~150-500 ns propagation delay. Maximum input current 10 mA; do not drive below -0.5 V. |
| 3 | CAOUT | output | Current error amplifier output. Drives the PWM comparator; internal high level ~6.5 V, low level ~0.2 V. Loop compensation network is connected between CAOUT and MOUT (pin 5). |
| 4 | CAI | input | Current amplifier non-inverting input. Typically tied to the boost inductor current sense signal (through the sense-resistor network). Absolute maximum input voltage 8 V; input bias current -100 nA typical. |
| 5 | MOUT | bidirectional | Multiplier output AND current-amplifier inverting input. The multiplier sources a programming current here (up to ~300 µA into the sense resistor R_MO) that sets the reference for the current loop. Absolute maximum 8 V; do not drive below -0.5 V. |
| 6 | IAC | input | AC line current input to the multiplier. Programmed via a large resistor from the rectified line to this pin so the current is proportional to the instantaneous input voltage (typical operating range 150 µA to 500 µA). Maximum input current 10 mA. |
| 7 | VAOUT | output | Voltage error amplifier output. Provides the low-frequency loop control signal (approx. 1.25 V to 5 V active range) that feeds the multiplier and the zero-power comparator (threshold 0.33 V). High-level output 5.5 V typ, low-level 50 mV typ. |
| 8 | VFF | input | Feed-forward voltage input to the multiplier squarer/divider. Sourced with -150 µA typ. from the internal current mirror; a filter cap and divider from the rectified line create the RMS-line feed-forward signal (typical range 1.4 V to 4.7 V). |
| 9 | VREF | power_out | 7.5 V (±1.5%) precision reference output. Sourced up to a few mA for external circuitry; short-circuit current typical -25 mA. Bypass with a low-ESR ceramic capacitor to GND. |
| 10 | OVP/EN | input | Combined overvoltage-protection sense and enable input. OVP trips when the pin exceeds VREF + 0.5 V (500 mV hysteresis). The device is disabled when this pin is pulled below 1.9 V (100-300 mV hysteresis). Absolute maximum input voltage 10 V. |
| 11 | VSENSE | input | Voltage error amplifier inverting input (voltage feedback). Regulated to the internal 7.5 V reference; VSENSE bias current 200 nA max. Absolute maximum input voltage 10 V. Also referred to as SSENSE in the pin diagram. |
| 12 | RT | input | Oscillator charging-current programming pin. A resistor from RT to GND sets the oscillator charging current (recommended 1.36 mA to 10 mA), which together with CT sets the switching frequency (6 kHz to 220 kHz range; 100 kHz typical with 22 kΩ / 270 pF). |
| 13 | SS | input | Soft-start capacitor connection. Charged by an internal -10 µA source (-6 to -16 µA); the SS voltage clamps the voltage-loop output during startup, allowing controlled ramp of DRVOUT duty cycle. Absolute maximum voltage 8 V. |
| 14 | CT | input | Oscillator timing capacitor to GND. Together with RT sets switching frequency; ramp peak ≈5 V with 4 Vpp amplitude. |
| 15 | VCC | power_in | Positive bias supply. Recommended operating range 12 V to 18 V, absolute max 18 V. UVLO turn-on 10.2 V typ / turn-off 9.7 V typ (UCC2818A); operating supply current 4 mA typ with no gate load. Bypass with a low-ESR capacitor close to the pin. |
| 16 | DRVOUT | output | Gate-drive output to the boost MOSFET. Peak ±1.2 A drive with 12 Ω pull-up / 4 Ω pull-down typ; 25 ns rise / 10 ns fall into 1 nF, 10 Ω. Maximum continuous current 0.2 A; maximum duty cycle 95% typ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | PMIC |
| Pins | 16 |
Ordering variants
UCC2818ADRDUCC2818ADRUCC2818ADRDTRUCC2818ADRNUCC2818ADRPWUCC2818ADRPWR
CAD (KiCad official)
- Symbol:
UCC2818ADR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
bd38dec546e1e7ad, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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