component
UCC25600DR
Public Unreviewedby Ray
Texas Instruments DC-DC Converters, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC25600DR
Texas Instruments · DC-DC Converters · SOIC-8
UCC25600DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DT | input | Dead-time programming pin. Connect a resistor to ground; with the internal 2.25-V reference, the resulting current sets the dead time between high-side and low-side gate drives. Minimum enforced dead time is 120 ns to prevent shoot-through if the pin is shorted to ground (recommended R = 3.3 kΩ to 39 kΩ). |
| 2 | RT | input | Switching frequency programming pin. The current flowing out of RT sets the gate-driver switching frequency; a resistor to ground sets the minimum frequency, and an opto-coupler collector tied here provides regulation. A series resistor with the opto sets the maximum frequency (recommended R = 1 kΩ to 8.666 kΩ). |
| 3 | OC | input | Overcurrent protection sense input. When V(OC) > 1 V (typ) the gate drivers are actively pulled low; recovery with soft-start occurs below 0.6 V. If V(OC) exceeds 2 V (typ), the device latches off until VCC is brought below the UVLO threshold. |
| 4 | SS | input | Soft-start pin. A capacitor to ground (0.01 µF to 1 µF) sets the soft-start ramp time. Pulling SS below 1 V disables the device (ON/OFF control); soft-start re-executes after any fault clears (bias OV, UVLO, OCP, OTP). |
| 5 | GD2 | output | Low-side gate driver output for the half-bridge. Connects to the gate-drive transformer primary along with GD1. Integrated driver sources 0.4 A and sinks 0.8 A; continuous drive current rated ±25 mA (abs max). |
| 6 | GND | power_in | Device ground reference for bias supply, gate driver return, and all analog thresholds. |
| 7 | VCC | power_in | Bias supply input. Connect to a source less than 20 V (recommended 11.5 V to 18 V; abs max 22 V). Bypass with a 1-µF capacitor to GND. UVLO turn-on typ 10.5 V, turn-off typ 9.5 V; OVP typ 20 V. |
| 8 | GD1 | output | High-side gate driver output for the half-bridge. Connects to the gate-drive transformer primary along with GD2. Integrated driver sources 0.4 A and sinks 0.8 A; continuous drive current rated ±25 mA (abs max). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
UCC25600DR
CAD (KiCad official)
- Symbol:
UCC25600DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
80623aaeff4a5c05, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).