component

UCC21222DR

Public Unreviewed

by Ray

Texas Instruments Isolators - Gate Drivers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentpower management (pmic)ucc21222dr
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

Datasheet

Open in new tab ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

UCC21222DR

Texas Instruments · Isolators - Gate Drivers · SOIC-16

UCC21222DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INA input Input signal for A channel. TTL/CMOS compatible input threshold, internally pulled low if left open. Recommended RC filter: R = 10-100 Ω, C = 10-100 pF.
2 INB input Input signal for B channel. TTL/CMOS compatible input threshold, internally pulled low if left open. Recommended RC filter: R = 10-100 Ω, C = 10-100 pF.
3 VCCI power_in Primary-side supply voltage (3.0-5.5 V). Locally decouple to GND using a low ESR/ESL capacitor located as close to the device as possible.
4 GND power_in Primary-side ground reference. All signals on the primary side are referenced to this ground.
5 DIS input Disable both driver outputs when asserted high; enables both outputs when set low. Internally pulled high if left floating. Recommended to tie to ground if not used. Recommended RC filter: R = 0-100 Ω, C = 100 pF-1000 pF.
6 DT input Dead-time programming pin. Float or short to VCCI to disable dead-time interlock (allows overlap). Place 1.7 kΩ to 100 kΩ RDT between DT and GND to set minimum dead time. Place 0-150 Ω or short to GND for interlocked outputs. Do not bypass with a >1 nF ceramic capacitor.
7 NC unconnected No internal connection.
8 VCCI power_in Primary-side supply voltage. This pin is internally shorted to pin 3.
9 VSSB power_in Ground reference for secondary side B channel.
10 OUTB output Output of driver B. Connect to the gate of the B channel transistor through a gate resistor. Delivers up to 4 A peak source / 6 A peak sink.
11 VDDB power_in Secondary-side power for driver B (up to 25 V, 8 V UVLO). Locally decouple to VSSB using a low ESR/ESL capacitor located as close to the device as possible.
12 NC unconnected No internal connection.
13 NC unconnected No internal connection.
14 VSSA power_in Ground reference for secondary side A channel.
15 OUTA output Output of driver A. Connect to the gate of the A channel transistor through a gate resistor. Delivers up to 4 A peak source / 6 A peak sink.
16 VDDA power_in Secondary-side power for driver A (up to 25 V, 8 V UVLO). Locally decouple to VSSA using a low ESR/ESL capacitor located as close to the device as possible.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Power Management (PMIC)
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • UCC21222DR

CAD (KiCad official)

  • Symbol: UCC21222DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 25657ddec18b5e1f, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF