Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

UC3845AN-TD

TDSEMIC · DC-DC Converters · DIP-8

UC3845AN-TD from TDSEMIC, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Error amplifier compensation input/output. Loop compensation network (Zf) is connected between this pin and VFB (pin 2). Pulling this pin below two diode drops shuts down the PWM output.
2 VFB input Inverting input of the error amplifier. Typically connected via a resistor divider to the converter output; internally compared against the 2.5 V reference (½ VREF).
3 ISENSE input Current-sense comparator input. Connected to the current-sense resistor on the MOSFET source; peak current limit occurs at 1.0 V (Ismax = 1.0 V / Rs). Raising above 1 V forces shutdown.
4 RT/CT passive Oscillator timing pin. External RT (to VREF) and CT (to GND) set the switching frequency (up to 500 kHz). Oscillator ramp amplitude is 1.6 V pk-pk.
5 GND power_in Power/signal ground reference for the IC. All bypass capacitors and current-sense components should return to this pin with a low-impedance path.
6 OUTPUT output High-current totem-pole PWM output for driving the gate of an N-channel power MOSFET. Peak ±1 A source/sink, VOH ≈ 13.5 V @ 200 mA, VOL ≈ 1.6 V @ 200 mA. Low during UVLO and off-time.
7 VCC power_in IC supply input. UVLO turn-on threshold ≈ 8.4 V, turn-off ≈ 7.6 V (hysteresis). Absolute max 30 V; recommended operating up to 28 V. Startup current < 0.5 mA, operating ICC typ 12 mA.
8 VREF power_out Trimmed 5.0 V bandgap reference output (4.90 V-5.10 V @ 1 mA). Capable of sourcing up to 20 mA to bias external circuitry; short-circuit current limited to ~100 mA. Bypass with 0.1 µF to GND.

Key specifications

Parameter Value
Manufacturer TDSEMIC
Package DIP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • UC3845AN-TDN
  • UC3845AN-TDM/TR

CAD (KiCad official)

  • Symbol: UC3845AN-TD
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
uc3845an-td.step 271 KB You want the bare part, or you mark your own boards.
uc3845an-td-etched.step 2.2 MB You want the part with UC3845AN-TD already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 535 faces against 148 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TDSEMIC datasheet (10 pp, sha256 763dac3709f0ebda, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF