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uc3844an
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XBLW UC3844AN XBLW AC-DC Controllers and Regulators, DIP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownUC3844AN
XBLW UC3844AN XBLW · AC-DC Controllers and Regulators · DIP-8
UC3844AN from XBLW UC3844AN XBLW, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output / compensation node. External compensation network from this pin to VFB (pin 2) sets the loop response. Pulling this pin below the two-diode drop above ground shuts the controller off. |
| 2 | VFB | input | Inverting input of the internal error amplifier (voltage feedback). Compared internally to the 2.5 V reference; input voltage range approximately 2.42-2.58 V nominal (abs. max -0.3 to +6.3 V). |
| 3 | ISENSE | input | Current-sense input from the power MOSFET source resistor. Peak current threshold ~1 V (Is(max) ≈ 1.0 V/Rs). Raising this pin above 1 V shuts the output off for the remainder of the cycle; a small RC filter is recommended to suppress leading-edge spikes. |
| 4 | RT/CT | passive | Oscillator timing pin. External RT to VREF (pin 8) and CT to GND set the switching frequency (f ≈ 1.8/(RT·CT) for RT > 5 kΩ). Oscillator voltage swing ~1.6 Vpp; typical fosc ~52 kHz with RT = 10 kΩ, CT = 3.3 nF. |
| 5 | GND | power_in | Device ground return for both signal and power (single-point ground). All timing and bypass capacitors should be placed next to this pin and returned to a single-point ground. |
| 6 | OUTPUT | output | High-current totem-pole (push-pull) gate drive output for the external power MOSFET. Sources/sinks up to ±1 A peak; VOH ≈ 12-13.5 V, VOL ≈ 0.1-2.2 V; typical rise/fall time ~50 ns into 1 nF. Held high-Z during UVLO. |
| 7 | VCC | power_in | Positive supply input for the controller and output driver. UVLO turn-on threshold ~15.5 V (typ, 14.5-17.5 V), turn-off threshold ~9.8 V (typ, 8.5-11.5 V). Absolute max 30 V; internal 34 V zener clamp (Icc = 25 mA). |
| 8 | VREF | power_out | Buffered 5 V reference output (4.9-5.1 V, IREF = 1 mA). Sources up to ~20 mA to bias external circuits and the RT timing resistor. Short-circuit current -30 to -180 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW UC3844AN XBLW |
| Package | DIP-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
UC3844ANXBLWUC3844ANUC3844ANXBLWUC3844BDTR
CAD (KiCad official)
- Symbol:
UC3844AN - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW UC3844AN XBLW datasheet (None pp, sha256
d938ec712fc51657, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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