component
UC3843AP-S08-R
Public Unreviewedby Ray
UTC Unisonic Tech AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUC3843AP-S08-R
UTC Unisonic Tech · AC-DC Controllers and Regulators · SOIC-8
UC3843AP-S08-R from UTC Unisonic Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Error amplifier output / compensation node. External Zf/Zi network is connected between COMP (pin 1) and VFB (pin 2) to set the closed-loop response. Can source/sink up to ~0.5 mA; pulling COMP below ~two diode drops above GND shuts down the PWM output. |
| 2 | VFB | input | Inverting input of the error amplifier (voltage feedback). Internally referenced against 2.5 V; the error amplifier regulates VFB to 2.5 V (typ). Input bias current ~-0.3 µA. Analog input rating -0.3 V to +6.3 V. |
| 3 | CS | input | Current sense input. Compared against an internal 1 V threshold (max input signal 1.0 V) through the current-sense comparator for pulse-by-pulse current limiting; peak switch current Is_max = 1.0 V / Rs. Delay to output ~150 ns. Analog input rated -0.3 V to +6.3 V. |
| 4 | RT/CT | passive | Oscillator timing pin. An external timing resistor RT to VREF and timing capacitor CT to GND set the switching frequency (e.g. RT=10 kΩ, CT=3.3 nF → ~52 kHz). Oscillator ramp amplitude ~1.7 Vpp. Supports operation up to 500 kHz. |
| 5 | GND | power_in | Device ground / signal and power return. Timing and bypass capacitors should return to pin 5 at a single point to minimize noise from high peak gate-drive currents. |
| 6 | OUTPUT | output | High-current totem-pole gate-drive output for directly driving an external power MOSFET. Peak output current ±1 A; VOH ≈ 13.5 V at 20 mA source, VOL ≈ 0.1 V at 20 mA sink. Rise/fall times ~50 ns into 1 nF. Held in high-Z during UVLO; a bleeder to GND is recommended. |
| 7 | VCC | power_in | Positive supply input for the IC and gate driver. Absolute max 30 V (low-impedance source); internal zener clamp at ~34 V (ICC=25 mA). UC3843A UVLO: start ~8.4 V, min operating ~7.6 V after turn-on. Start-up current ~0.12 mA typ; operating supply current ~11 mA typ. |
| 8 | VREF | power_out | Internally trimmed 5.0 V band-gap reference output (4.9 V/5.0 V/5.1 V at TJ=25 °C, IOUT=1 mA). Used to bias the RT timing resistor and external circuitry; short-circuit current ~-100 mA typ. Total output variation over line/load/temperature 4.82-5.18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UTC Unisonic Tech |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
UC3843AP-S08-RUC3843AL-S08-RUC3843AP-S08-TUC3843AL-S08-TUC3843AP-D08-TUC3843AL-D08-T
CAD (KiCad official)
- Symbol:
UC3843AP-S08-R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UTC Unisonic Tech datasheet (9 pp, sha256
156578ac13622df2, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).