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UC3525ADWTR

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by Ray

Texas Instruments DC-DC Controllers, SOIC-16-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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UC3525ADWTR

Texas Instruments · DC-DC Controllers · SOIC-16-300mil

UC3525ADWTR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INV Input input Inverting input to the internal error amplifier. Used for the feedback divider in voltage-mode control loops.
2 NI Input input Noninverting input to the internal error amplifier. Typically tied to the reference divider (from VREF) that sets the regulation setpoint.
3 SYNC bidirectional Oscillator sync terminal. Allows external clock synchronization of the internal oscillator or master/slave operation of multiple UC3525A units. Sync input current up to ~2.5 mA at 3.5 V.
4 OSC Output output Oscillator frequency output. Provides a buffered clock signal (~3.5 V amplitude, 0.5 us clock width typical) for external synchronization or monitoring.
5 CT passive Timing capacitor connection for oscillator frequency programming. Recommended CT range 0.001-0.01 uF; should be routed with minimal trace length to the device.
6 RT passive Timing resistor connection for oscillator frequency programming. Recommended RT range 2 kOhm to 150 kOhm.
7 Discharge passive Timing-capacitor discharge terminal. A single resistor between CT (pin 5) and Discharge (0-500 Ohm) sets the dead time between the two output drivers.
8 Soft Start input Soft-start input pin. An external capacitor to ground sets the soft-start ramp time as it is charged by an internal ~50 uA current source.
9 Compensation output Output of the error amplifier used for loop compensation. Connect an R-C network to the INV Input pin to shape the control-loop response.
10 Shutdown input PWM shutdown input. Pulling this pin high (>~0.6 V threshold) provides instantaneous pulse-by-pulse turn-off of the outputs and initiates soft-start recycle on longer shutdowns.
11 Output A output Output A of the on-chip totem-pole drive stage. Alternately drives with Output B at half the oscillator frequency. Source/sink capable up to 400 mA peak (100 mA continuous).
12 Ground power_in Ground return pin for the logic and reference sections.
13 VC power_in Collector supply pin for the output driver stage (4.5-35 V recommended). Bypass with a 0.1 uF monolithic ceramic low-ESL capacitor with minimal trace length.
14 Output B output Output B of the on-chip totem-pole drive stage. Complementary to Output A; each output runs at half the oscillator frequency.
15 +VIN power_in Main input supply voltage (8-35 V recommended, 40 V absolute max). Powers the internal reference, oscillator, and control logic.
16 VREF power_out 5.1 V trimmed (1%) reference output, up to 20 mA load. Bypass with a 0.1 uF monolithic ceramic low-ESL capacitor with minimal trace length to the ground plane for stability.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Power Supply Chip
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • UC3525ADWTR
  • UC3525ADWTRJ
  • UC3525ADWTRN
  • UC3525ADWTRFN
  • UC3525ADWTRFK

CAD (KiCad official)

  • Symbol: UC3525ADWTR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 b00857cf7b0456e9, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF