TX6122 from XDS, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Device ground return. Should tie to the low side of the RCS current-sense resistor with a short, wide trace to preserve current-sense accuracy.
2	NC	unconnected	No connect. Leave floating (悬空).
3	DIM	input	Dimming input. Supports PWM dimming and linear dimming (linear range 1.1V-3.1V). Below ~0.9V the LED output is disabled; above 3.1V output is 100%. Must not be left floating; when unused, tie high. For linear dimming, add a >=10nF cap to GND.
4	SW	output	Switch node, internally the drain of the integrated 60V power NMOS (RDS(on)~30mΩ at VGS=5V). Connects to the buck inductor / freewheeling diode. Absolute-max SW voltage 60V.
5	CS	input	Inductor peak current sense input. Tied together with pin 6 to the top of the external RCS sense resistor; the MOS turns off when V(CS) reaches VCS_TH (~255mV typ).
6	CS	input	Inductor peak current sense input (duplicate of pin 5). Both CS pins connect to the top of the RCS sense resistor for the peak-current comparator.
7	TOFF	input	Fixed off-time programming pin. An external capacitor COFF to GND sets TOFF = 0.51 * 150kΩ * (COFF + 7.3pF) + 61ns. With TOFF open, the internal minimum off-time is ~650ns.
8	VDD	power_in	Chip supply pin. Fed from VIN through an external dropping resistor RVDD = (VIN - VDD) / IVDD; internally clamped by a zener at ~5.5V (max clamp current 10mA). Operating current ~1.5mA at Fop=200kHz; standby ~200uA. UVLO rising ~3.2V with 0.5V hysteresis.
9	EP	passive	Exposed thermal pad on the ESOP-8 bottom. Internally connected to the SW pin (MOS drain). Solder to the SW copper island for heat dissipation; do NOT tie to GND.

Key specifications

Parameter	Value
Manufacturer	XDS
Package	ESOP-8
Category	LED-drv
Pins	9

CAD (KiCad official)

Symbol: TX6122
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
3D model: ESOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tx6122.step`	193 KB	You want the bare part, or you mark your own boards.
`tx6122-etched.step`	1.1 MB	You want the part with `TX6122` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 278 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: XDS datasheet (7 pp, sha256 09f4d87b0667435d, retrieved 2026-08-17, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF