component
tusb522pirger
Public Unreviewedby Ray
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HVQFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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README
markdownTUSB522PIRGER
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HVQFN-24-EP(4x4)
TUSB522PIRGER from Texas Instruments, in a HVQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Positive power supply input, 3.3 V nominal (3.0-3.6 V). Decouple with a 0.1 µF cap close to the pin. |
| 2 | EQ1 | input | 3-state CMOS input setting the Channel 1 receiver equalizer gain: Low=3 dB, Mid/Float=6 dB, High=9 dB. Integrated pull-up (~410 kΩ) and pull-down (~240 kΩ). |
| 3 | DE2 | input | 3-state CMOS input setting Channel 2 output de-emphasis: Low=0 dB, Mid/Float=-3.5 dB, High=-6.2 dB (with OS2=Low). Integrated pull-up/pull-down. |
| 4 | OS2 | input | 2-state CMOS input selecting Channel 2 output differential swing: Low=0.9 Vpp, High=1.1 Vpp. Integrated ~660 kΩ pull-down. |
| 5 | EN_RXD | input | Device enable (2-state CMOS). High=active; Low=shutdown (60 µA). Internal 660 kΩ pull-down; drive high or add a 4.7 kΩ pull-up. Toggling resets the state machine. |
| 6 | NC | unconnected | No connection. May be left floating or tied to any voltage including GND. |
| 7 | NC | unconnected | No connection. May be left floating or tied to any voltage including GND. |
| 8 | RX1N | input | Channel 1 differential receiver negative input (5 Gbps USB 3.1 GEN 1). AC-coupled through 75-200 nF (100 nF typical); internal 90 Ω differential termination. |
| 9 | RX1P | input | Channel 1 differential receiver positive input (5 Gbps USB 3.1 GEN 1). AC-coupled through 75-200 nF (100 nF typical); internal 90 Ω differential termination. |
| 10 | GND | power_in | Ground. Per datasheet, pins 10 and 21 may be connected to GND or left unconnected; the thermal PAD must be soldered to GND. |
| 11 | TX2N | output | Channel 2 differential transmitter negative output (5 Gbps USB 3.1 GEN 1). Requires external AC-coupling capacitor (75-200 nF, 100 nF typical). |
| 12 | TX2P | output | Channel 2 differential transmitter positive output (5 Gbps USB 3.1 GEN 1). Requires external AC-coupling capacitor (75-200 nF, 100 nF typical). |
| 13 | VCC | power_in | Positive power supply input, 3.3 V nominal (3.0-3.6 V). Decouple with a 0.1 µF cap close to the pin. |
| 14 | RSV | input | Reserved CMOS input. Can be left as no-connect. |
| 15 | OS1 | input | 2-state CMOS input selecting Channel 1 output differential swing: Low=0.9 Vpp, High=1.1 Vpp. Integrated ~660 kΩ pull-down. |
| 16 | DE1 | input | 3-state CMOS input setting Channel 1 output de-emphasis: Low=0 dB, Mid/Float=-3.5 dB, High=-6.2 dB (with OS1=Low). Integrated pull-up/pull-down. |
| 17 | EQ2 | input | 3-state CMOS input setting the Channel 2 receiver equalizer gain: Low=3 dB, Mid/Float=6 dB, High=9 dB. Integrated pull-up (~410 kΩ) and pull-down (~240 kΩ). |
| 18 | NC | unconnected | No connection. May be left floating or tied to any voltage including GND. |
| 19 | RX2P | input | Channel 2 differential receiver positive input (5 Gbps USB 3.1 GEN 1). Internal 90 Ω differential termination; downstream device is expected to provide AC coupling. |
| 20 | RX2N | input | Channel 2 differential receiver negative input (5 Gbps USB 3.1 GEN 1). Internal 90 Ω differential termination; downstream device is expected to provide AC coupling. |
| 21 | GND | power_in | Ground. Pins 10 and 21 may be connected to GND or left unconnected; the thermal PAD must be soldered to GND. |
| 22 | TX1P | output | Channel 1 differential transmitter positive output (5 Gbps USB 3.1 GEN 1). Requires external AC-coupling capacitor (75-200 nF, 100 nF typical). |
| 23 | TX1N | output | Channel 1 differential transmitter negative output (5 Gbps USB 3.1 GEN 1). Requires external AC-coupling capacitor (75-200 nF, 100 nF typical). |
| 24 | NC | unconnected | No connection. May be left floating or tied to any voltage including GND. |
| 25 | PAD | power_in | Exposed thermal pad on the bottom of the VQFN package. Must be soldered to the GND plane for proper thermal and electrical performance (RθJC(bot) = 9.7 °C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVQFN-24-EP(4x4) |
| Category | PMIC |
| Pins | 25 |
Ordering variants
TUSB522PIRGERTUSB522PIRGERRGETTUSB522PIRGERIRGET
CAD (KiCad official)
- Symbol:
TUSB522PIRGER - Footprint:
Package_DFN_QFN:HVQFN-24-1EP_4x4mm_P0.5mm_EP2.1x2.1mm - 3D model: HVQFN-24-EP(4x4) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
9bb51f185749356d, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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