TPT1042V-SO1R-S from 3PEAK, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TXD	input	CAN transmit data input from the CAN controller. LOW drives a dominant bus state; HIGH allows a recessive bus state. Logic thresholds referenced to VIO (VIH ≥ 0.7×VIO, VIL ≤ 0.3×VIO). Input capacitance ~5 pF.
2	GND	power_in	Device ground return for VCC and VIO supplies and the CAN bus driver.
3	VCC	power_in	Transceiver 5 V bus-side supply voltage, recommended 4.5 V to 5.5 V. Powers the CAN bus driver. Absolute maximum 7 V. Undervoltage detection with rising threshold ~4.1 V and falling ~3.9 V.
4	RXD	output	CAN receive data output to the CAN controller. LOW indicates a dominant bus state; HIGH indicates a recessive bus state. Output swing referenced to VIO; drive capability ±2 mA (max ±8 mA).
5	VIO	power_in	Transceiver I/O level-shifting supply voltage, 2.8 V to 5.5 V. Sets logic thresholds for TXD/STB inputs and the RXD output level, enabling direct interface to 3.3 V (or other low-voltage) MCUs. Undervoltage detection with rising ~2 V and falling ~1.9 V.
6	CANL	bidirectional	Low-level CAN bus input/output line. Differential pair with CANH; driven low relative to CANH in the dominant state. ±70 V bus fault protection and ±15 kV IEC 61000-4-2 ESD protection. Common-mode range ±30 V.
7	CANH	bidirectional	High-level CAN bus input/output line. Differential pair with CANL; driven high relative to CANL in the dominant state. ±70 V bus fault protection and ±15 kV IEC 61000-4-2 ESD protection. Common-mode range ±30 V.
8	STB	input	Standby Mode control input (active high). HIGH places the device in low-current standby mode with CAN bus wake-up capability; LOW selects normal operating mode. Logic thresholds referenced to VIO (VIH ≥ 0.7×VIO, VIL ≤ 0.3×VIO).

Key specifications

Parameter	Value
Manufacturer	3PEAK
Package	SOP-8
Category	Comm/UART
Pins	8

Ordering variants

Same part, different packaging or reel option.

TPT1042V-SO1R-S
TPT1042V-SO1R-SDF6R-S

CAD (KiCad official)

Symbol: TPT1042V-SO1R-S
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tpt1042v-so1r-s.step`	122 KB	You want the bare part, or you mark your own boards.
`tpt1042v-so1r-s-etched.step`	2.5 MB	You want the part with `TPT1042V-SO1R-S` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 630 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: 3PEAK datasheet (24 pp, sha256 20a9083e3fcb40e6, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF