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Contents

README

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TPSY8121C1ABC

TECH PUBLIC · DC-DC Converters · SOT-23-6

TPSY8121C1ABC from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BS passive Boot-strap pin. Supply for the high-side gate driver. Decouple this pin to LX with a 0.1 µF ceramic capacitor. Absolute max BS-LX voltage: 4 V.
2 GND power_in Device ground return. Connect to a solid ground plane; keep the CIN loop area to IN/GND minimized.
3 FB input Output feedback pin. Connect to the center tap of the output resistor divider R1/R2 to program Vout = 0.6 V × (1 + R1/R2). Internal reference is 0.6 V ±2%; FB absolute max 4 V.
4 EN input Enable control. Pull high (VIH ≥ 2 V) to turn the regulator on; low (VIL ≤ 0.5 V) to shut down. Do not float. Absolute max EN voltage: VIN + 0.3 V.
5 IN power_in Power input, 4.5 V to 20 V (abs max 20 V). Decouple to GND with at least a 1 µF (typ. 4.7 µF X5R) low-ESR ceramic capacitor placed close to the IN and GND pins.
6 LX output Switching node. Connect to the output inductor. Internally driven by the top/bottom power FETs (90/70 mΩ RDS(ON)); absolute max LX voltage -0.3 V to VIN + 0.3 V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-6
Category PMIC
Pins 6

CAD (KiCad official)

  • Symbol: TPSY8121C1ABC
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (7 pp, sha256 99c89201d54a5f7d, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF