TPS7A6633QDGNRQ1
Public Unreviewedby Ray
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownTPS7A6633QDGNRQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
TPS7A6633QDGNRQ1 from Texas Instruments, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated input power-supply voltage. Recommended operating range 4 V to 40 V (absolute max 45 V for 200 ms). Bypass to GND with a 10-µF (nominal) input capacitor. |
| 2 | EN | input | Enable pin. Drive above the enable threshold to enable the regulator; the device enters standby (shutdown) when EN falls below the enable threshold. Rated 0 V to 40 V (absolute max 45 V). |
| 3 | NC | unconnected | No internal connection. Leave floating or tie to GND per layout preference. |
| 4 | CT | passive | Reset-pulse delay adjustment. Connect a capacitor from CT to GND to program the PG reset delay (default ~290 µs with CT open). CT pin voltage range 0 V to 20 V (absolute max 25 V). |
| 5 | GND | power_in | Device ground reference. All voltage measurements are with respect to this pin. |
| 6 | PG | output | Power-good open-drain output. Requires an external pull-up resistor to VOUT. PG is logic-high when VOUT is above the power-on-reset threshold (~91.6% of V(OUT)); asserted low during reset delay or when VOUT is out of regulation. Rated 0 V to 5.5 V. |
| 7 | FB/DNC | input | Feedback / Do-Not-Connect. On the fixed-output TPS7A6633-Q1 this pin is DNC (do not connect) and must be left floating. Rated 0 V to 5.5 V. |
| 8 | VOUT | power_out | Regulated 3.3-V output, 150 mA. Requires a 2.2-µF to 100-µF low-ESR ceramic output capacitor to GND. Typical dropout 300 mV at 150 mA (V(IN) = 4 V). |
| PAD | Thermal Pad | passive | Exposed thermal pad on the bottom of the HVSSOP-DGN package. Solder to a GND copper plane for heat dissipation; electrically ground. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8-EP |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
TPS7A6633QDGNRQ1TPS7A6633QDGNRQ1DGNTQ1TPS7A6633QDGNRQ1DRQ1TPS7A6633QDGNRQ1DTQ1
CAD (KiCad official)
- Symbol:
TPS7A6633QDGNRQ1 - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
tps7a6633qdgnrq1.step |
114 KB | You want the bare part, or you mark your own boards. |
tps7a6633qdgnrq1-etched.step |
3.3 MB | You want the part with TPS7A6633QDGNRQ1 already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 780 faces against 140 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
a64d14449cef24b9, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).