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TPS7A6333QPWPRQ1

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by Ray

Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-14-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentpower management (pmic)tps7a6333qpwprq1
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Datasheet

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Contents

README

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TPS7A6333QPWPRQ1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-14-EP

TPS7A6333QPWPRQ1 from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated input supply, 7 V to 40 V (transients to 45 V, absolute max 45 V). Bypass to GND with a ceramic capacitor to damp line transients.
2 nRST output Active-low open-drain power-on reset output. Requires an external pull-up resistor to VOUT. Asserted low during startup delay and when VOUT is out of regulation.
3 NC unconnected No internal connection on the TPS7A6333-Q1 fixed-output variant. (This pin is FB on the adjustable TPS7A6x01-Q1 variants.) Leave floating or tie to GND.
4 GND power_in Device signal ground reference. Connect to the system ground plane together with the exposed PowerPAD.
5 EN input Chip enable, high-voltage tolerant (0 V to 40 V) input with internal pull-down. Drive high (VEN >= 4 V) to enable the regulator; tie to VIN for always-on self-bias. Sleep current <2 µA when EN is low.
6 RDELAY output Reset delay timer pin. Programs the power-on reset delay via an external capacitor (CDLY) from this pin to GND; leave open for the fixed ~250 µs default delay. 0 V to 5.25 V operating range.
7 VOUT power_out Regulated 3.3 V output, 300 mA max. Requires a low-ESR ceramic output capacitor from this pin to GND for stability. Includes short-circuit and over-current protection.
8 NC unconnected No internal connection. Leave floating or tie to GND.
9 WD_FLT output Active-low watchdog fault output (open-drain style), requires an external pull-up to VOUT. Asserted when the watchdog window is missed or violated. 0 V to 5.25 V operating range.
10 WD input Watchdog service (kick) input. External MCU pulses this pin within the watchdog window to prevent a fault assertion. 0 V to 5.25 V operating range.
11 NC unconnected No internal connection. Leave floating or tie to GND.
12 nWD_EN input Active-low watchdog enable input with internal pull-down. Leave floating (or drive low) to keep the watchdog enabled; drive high to disable or reinitialize the watchdog. 0 V to 5.25 V operating range.
13 NC unconnected No internal connection. Leave floating or tie to GND.
14 ROSC output Oscillator programming pin. Sets the internal oscillator frequency (and the watchdog window duration) via an external resistor from this pin to GND. Constant-voltage reference (max 7 V).
15 PAD passive Exposed thermal PowerPAD on the underside of the HTSSOP-14 package. Must be soldered to a ground copper pour for thermal dissipation and connected electrically to GND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-14-EP
Category Power Management (PMIC)
Pins 15

Ordering variants

Same part, different packaging or reel option.

  • TPS7A6333QPWPRQ1
  • TPS7A6333QPWPRQ1DRKR
  • TPS7A6333QPWPRQ1DRKT

CAD (KiCad official)

  • Symbol: TPS7A6333QPWPRQ1
  • Footprint: Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 fded27fe6d72aad1, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF