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TPS65266RHBR

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by Ray

Texas Instruments DC-DC Converters, VQFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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TPS65266RHBR

Texas Instruments · DC-DC Converters · VQFN-32-EP(5x5)

TPS65266RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground pin. Route separately from high-current power grounds and tie to the (-) terminal of the VINQ bypass capacitor.
2 AGND power_in Analog ground pin. Route separately from high-current power grounds and tie to the (-) terminal of the VINQ bypass capacitor.
3 AGND power_in Analog ground pin. Route separately from high-current power grounds and tie to the (-) terminal of the VINQ bypass capacitor.
4 PGOOD output Open-drain power-good output. Asserts low when any buck output is out of regulation, or during thermal shutdown, overcurrent, undervoltage, or ENx low. Requires an external pull-up.
5 VINQ power_in Input supply for the internal controller and reference bias (2.7 V to 6.5 V). Bypass with a 1 uF ceramic capacitor to AGND placed close to the pin.
6 FB2 input Feedback Kelvin sensing input for buck2. Connect to the buck2 output resistor divider; internal reference is 0.6 V +/-1%.
7 COMP2 output Error amplifier output and loop compensation node for buck2. Connect a series R-C network from this pin to AGND to compensate the peak-current PWM loop.
8 SS2 input Soft-start / tracking input for buck2. An internal 5.5 uA pull-up charges an external capacitor from this pin to AGND to program the soft-start time.
9 BST2 passive Bootstrap supply for the buck2 high-side floating gate driver. Connect a 47 nF capacitor between BST2 and LX2.
10 LX2 power_out Switch node of buck2. Connect to the buck2 inductor and bootstrap capacitor; voltage swings from ~-0.7 V (diode drop below ground) up to VIN2.
11 PGND2 power_in Power ground return for buck2. Route as close as practical to the (-) terminal of the VIN2 input ceramic capacitor.
12 VIN2 power_in Input power supply for buck2 (2.7 V to 6.5 V). Bypass with a ~10 uF ceramic capacitor placed close to VIN2 and PGND2.
13 VIN3 power_in Input power supply for buck3 (2.7 V to 6.5 V). Bypass with a ~10 uF ceramic capacitor placed close to VIN3 and PGND3.
14 PGND3 power_in Power ground return for buck3. Route as close as practical to the (-) terminal of the VIN3 input ceramic capacitor.
15 LX3 power_out Switch node of buck3. Connect to the buck3 inductor and bootstrap capacitor; voltage swings from ~-0.7 V below ground up to VIN3.
16 BST3 passive Bootstrap supply for the buck3 high-side floating gate driver. Connect a 47 nF capacitor between BST3 and LX3.
17 SS3 input Soft-start / tracking input for buck3. An internal 5.5 uA pull-up charges an external capacitor from this pin to AGND to program the soft-start time.
18 COMP3 output Error amplifier output and loop compensation node for buck3. Connect a series R-C network from this pin to AGND to compensate the peak-current PWM loop.
19 FB3 input Feedback Kelvin sensing input for buck3. Connect to the buck3 output resistor divider; internal reference is 0.6 V +/-1%.
20 ROSC input Oscillator frequency programming pin. Connect an external resistor from ROSC to AGND to set the switching frequency (250 kHz to 2.4 MHz).
21 AGND power_in Analog ground common to buck controllers and other analog circuits. Must be routed separately from high-current power grounds to the (-) terminal of the VINQ bypass capacitor.
22 FB1 input Feedback Kelvin sensing input for buck1. Connect to the buck1 output resistor divider; internal reference is 0.6 V +/-1%.
23 COMP1 output Error amplifier output and loop compensation node for buck1. Connect a series R-C network from this pin to AGND to compensate the peak-current PWM loop.
24 SS1 input Soft-start / tracking input for buck1. An internal 5.5 uA pull-up charges an external capacitor from this pin to AGND to program the soft-start time.
25 BST1 passive Bootstrap supply for the buck1 high-side floating gate driver. Connect a 47 nF capacitor between BST1 and LX1.
26 LX1 power_out Switch node of buck1. Connect to the buck1 inductor and bootstrap capacitor; voltage swings from ~-0.7 V below ground up to VIN1.
27 PGND1 power_in Power ground return for buck1. Route as close as practical to the (-) terminal of the VIN1 input ceramic capacitor.
28 VIN1 power_in Input power supply for buck1 (2.7 V to 6.5 V). Bypass with a ~10 uF ceramic capacitor placed close to VIN1 and PGND1.
29 EN1 input Enable input for buck1. Float to enable, or use a resistor divider from VINx to program the input undervoltage lockout threshold for buck1.
30 EN2 input Enable input for buck2. Float to enable, or use a resistor divider from VINx to program the input undervoltage lockout threshold for buck2.
31 EN3 input Enable input for buck3. Float to enable, or use a resistor divider from VINx to program the input undervoltage lockout threshold for buck3.
32 GND power_in Ground pin.
33 Thermal PAD passive Exposed thermal pad on the package bottom. No internal electrical bond to any signal, but must be soldered to the PCB ground plane for rated thermal performance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32-EP(5x5)
Category PMIC
Pins 33

Ordering variants

Same part, different packaging or reel option.

  • TPS65266RHBR
  • TPS65266RHBRRHBT

CAD (KiCad official)

  • Symbol: TPS65266RHBR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 0fbc91c317737d2c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF