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tps65252rhdr
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Texas Instruments DC-DC Converters, VQFN-28-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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README
markdownTPS65252RHDR
Texas Instruments · DC-DC Converters · VQFN-28-EP(5x5)
TPS65252RHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ROSC | input | Oscillator set. External resistor from ROSC to GND programs the internal switching-frequency oscillator between 300 kHz and 2.2 MHz (RFSW ≈ 50-600 kΩ). |
| 2 | FB1 | input | Feedback pin for buck converter 1. Connect a resistor divider from VOUT1 to FB1 to GND to set the output to VFB = 0.8 V. |
| 3 | COMP1 | output | Compensation pin for buck 1. Attach a series RC network to GND to complete the error-amplifier compensation of converter 1. |
| 4 | SS1 | input | Soft-start pin for buck 1. A small ceramic capacitor to GND sets the soft-start time (charged by ISS ≈ 5 µA). |
| 5 | RLIM1 | input | Cycle-by-cycle current-limit setting for buck 1. Resistor from RLIM1 to GND (75-300 kΩ) sets peak inductor current limit (1.1-5.2 A). |
| 6 | EN1 | input | Enable pin for buck 1. Logic-high enables the regulator (VIH ≈ 1.55-1.82 V, VIL ≈ 0.98-1.24 V). A capacitor to GND provides delayed start-up; internal ICHEN ≈ 1.1 µA pull-up. |
| 7 | BST1 | input | Bootstrap capacitor for buck 1. Fit a 47-nF ceramic capacitor between BST1 and LX1 to supply the high-side FET gate drive. Absolute max 7 V referenced to LX1. |
| 8 | VIN1 | power_in | Input supply for buck converter 1 (4.5 V to 16 V). Fit a 10-µF ceramic capacitor close to this pin. |
| 9 | LX1 | output | Switching node for buck converter 1 (pin 9 of the paralleled LX1 pair). Connect to the buck 1 output inductor. Absolute max -0.3 to 18 V; transient -3 to 18 V for <20 ns. |
| 10 | LX1 | output | Switching node for buck converter 1 (paralleled with pin 9). Tie both LX1 pins together on the board. |
| 11 | LX2 | output | Switching node for buck converter 2 (pin 11 of the paralleled LX2 pair). Connect to the buck 2 output inductor. Absolute max -0.3 to 18 V; transient -3 to 18 V for <20 ns. |
| 12 | LX2 | output | Switching node for buck converter 2 (paralleled with pin 11). Tie both LX2 pins together on the board. |
| 13 | VIN2 | power_in | Input supply for buck converter 2 (4.5 V to 16 V). Fit a 10-µF ceramic capacitor close to this pin. |
| 14 | BST2 | input | Bootstrap capacitor for buck 2. Fit a 47-nF ceramic capacitor between BST2 and LX2 to supply the high-side FET gate drive. Absolute max 7 V referenced to LX2. |
| 15 | EN2 | input | Enable pin for buck 2. Logic-high enables the regulator (VIH ≈ 1.55-1.82 V, VIL ≈ 0.98-1.24 V). A capacitor to GND provides delayed start-up for sequencing. |
| 16 | RLIM2 | input | Cycle-by-cycle current-limit setting for buck 2. Resistor from RLIM2 to GND (75-300 kΩ) sets peak inductor current limit (0.9-4.5 A). |
| 17 | SS2 | input | Soft-start pin for buck 2. A small ceramic capacitor to GND sets the soft-start time (charged by ISS ≈ 5 µA). |
| 18 | COMP2 | output | Compensation pin for buck 2. Attach a series RC network to GND to complete the error-amplifier compensation of converter 2. |
| 19 | FB2 | input | Feedback pin for buck converter 2. Connect a resistor divider from VOUT2 to FB2 to GND to set the output to VFB = 0.8 V. |
| 20 | LOW_P | input | Low-power operation-mode input for the TPS65252 (active high). Drive high to place the part in low-quiescent mode (IDDQ ≈ 0.5 mA vs. 10 mA typical). Thresholds VIH ≈ 1.55-1.82 V, VIL ≈ 0.98-1.24 V (referenced to V3V). |
| 21 | V7V | power_out | Internal 6.25-V bias-supply rail output (LDO from VIN, ≤10 mA). Connect a 10-µF ceramic capacitor from V7V to GND. Do not use as external supply. |
| 22 | V3V | power_out | Internal 3.3-V bias-supply rail output (LDO, ≤10 mA). Connect a 3.3-µF to 10-µF ceramic capacitor from V3V to GND. Serves as reference for logic-level thresholds on control pins. |
| 23 | rUSB | input | USB switch current-limit setting resistor. Fit a resistor from rUSB to GND to program the USB switch current limit (e.g. 154 kΩ ≈ 0.55 A, 76.8 kΩ ≈ 1.10 A). |
| 24 | PGOOD | output | Open-drain power-good output; asserted (released high) after both bucks are within regulation and the minimum reset period (~256 ms). Pull up externally (e.g. 100 kΩ to V3V). |
| 25 | USB_EN | input | Enable input for the USB switch. Logic-high turns on the USB pass FET (VIH ≈ 1.55 V, VIL ≈ 1.3 V, referenced to V3V). |
| 26 | USB_nILIM | output | USB over-current, open-drain, active-low fault flag. Asserts low (~0.3 V) when the USB switch enters current-limit or thermal shutdown. Pull up externally (e.g. 100 kΩ to V3V). |
| 27 | USB_VIN | power_in | USB switch input supply (3.3 V to 6 V). Drain of the internal USB pass FET; RDS(on) ≈ 120 mΩ at VUSB = 5 V. |
| 28 | USB_VO | power_out | USB switch output (source of the internal USB pass FET). Delivers up to ~1 A to downstream USB devices, current-limited by the resistor on rUSB. |
| 29 | PAD | power_in | Exposed thermal power pad on the underside of the QFN. Must be soldered to the board GND plane; provides the primary thermal path (θJA ≈ 34 °C/W) and the device ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-28-EP(5x5) |
| Category | PMIC |
| Pins | 29 |
Ordering variants
TPS65252RHDRTPS65252RHDRRHDT
CAD (KiCad official)
- Symbol:
TPS65252RHDR - Footprint:
Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm - 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
0ec928733efedba1, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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