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TPS65130RGER

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by Ray

Texas Instruments DC-DC Converters, VQFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Datasheet

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Contents

README

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TPS65130RGER

Texas Instruments · DC-DC Converters · VQFN-24-EP(4x4)

TPS65130RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INP input Boost converter switch input. Connect through the boost inductor to VIN.
2 PGND power_in Power ground pin (power stage return).
3 PGND power_in Power ground pin (power stage return).
4 VIN power_in Control supply input. Operating range 2.7 V to 5.5 V.
5 INN input Inverting converter switch input. Connect through inverter inductor to VIN.
6 INN input Inverting converter switch input. Connect through inverter inductor to VIN.
7 BSW output Gate control pin for external battery switch (PFET). Goes low when ENP is set high to enable the external PFET.
8 ENP input Enable pin for the positive output voltage (0 V: disabled, VIN: enabled). Logic thresholds: VIL ≤ 0.4 V, VIH ≥ 1.4 V.
9 PSP input Power-save mode enable for the boost converter stage (0 V: disabled, VIN: enabled).
10 ENN input Enable pin for the negative output voltage (0 V: disabled, VIN: enabled).
11 PSN input Power-save mode enable for the inverter stage (0 V: disabled, VIN: enabled).
12 NC unconnected No internal connection.
13 OUTN output Inverting converter switch output. Connect to the inverter flying/output network.
14 OUTN output Inverting converter switch output. Connect to the inverter flying/output network.
15 VNEG input Negative output voltage sense input. Operating range -15 V to -2 V.
16 FBN input Feedback pin for the negative output voltage divider. Regulation voltage typ. 0 V (±24 mV).
17 VREF output Reference output voltage (typ. 1.213 V). Bypass with a 220-nF capacitor to ground. Connect the lower resistor of the negative output voltage divider to this pin.
18 CN passive Compensation pin for the inverting converter control loop. Connect external compensation network here.
19 AGND power_in Analog ground pin (signal return).
20 NC unconnected No internal connection.
21 CP passive Compensation pin for the boost converter control loop. Connect external compensation network here.
22 FBP input Feedback pin for the positive output voltage divider. Regulation voltage typ. 1.213 V.
23 VPOS input Positive output voltage sense input. Operating range VIN+0.5 V to 15 V.
24 INP input Boost converter switch input. Connect through the boost inductor to VIN.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category PMIC
Pins 24

Ordering variants

Same part, different packaging or reel option.

  • TPS65130RGER
  • TPS65130RGERRGET

CAD (KiCad official)

  • Symbol: TPS65130RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
tps65130rger.step 277 KB You want the bare part, or you mark your own boards.
tps65130rger-etched.step 2.8 MB You want the part with TPS65130RGER already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 688 faces against 158 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 2d70b7f1a656b110, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF