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PCB Footprint

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Datasheet

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Contents

Pinout
Key specifications
Ordering variants
CAD (KiCad official)
3D model downloads
Provenance

README

markdown

TPS629210QDRLRQ1

Texas Instruments · Pre-ordered Chips · SOT-583-8

TPS629210QDRLRQ1 from Texas Instruments, in a SOT-583-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	FB/VSET	input	Dual-function pin. FB mode: voltage feedback input for external resistive divider setting VOUT from 0.6 V to 5.5 V. VSET mode: connect a resistor from this pin to GND to select one of 18 internal output-voltage options between 0.4 V and 5.5 V per Table 8-2. Function is chosen via the MODE/S-CONF pin configuration.
2	PG	output	Open-drain power-good output. Requires an external pull-up. Maximum sink current 1 mA (absolute max 10 mA). Asserts high when the regulated output is within the power-good window.
3	VOS	input	Output voltage sense pin. Connect directly to the positive terminal of the output capacitor for accurate remote sensing of VOUT and DCS-Control loop feedback.
4	SW	power_out	Switching node of the converter, connected internally to the high-side (250-mΩ RDS(on)) and low-side (85-mΩ RDS(on)) power MOSFETs. Connect the external inductor (typ. 2.2 µH) between this pin and VOUT. Abs. max −3 V to 23 V (AC, <10 ns).
5	GND	power_in	Device ground return for power stage and control circuitry. Connect to the ground plane with a low-impedance path; place VIN and output capacitors' return traces close to this pin.
6	VIN	power_in	Power supply input, 3 V to 17 V operating (abs. max 18 V). Place a 4.7-µF (typ) ceramic input capacitor as close as possible between VIN and GND.
7	EN	input	Precise enable input with threshold comparator. Drive low to disable the device (shutdown), high to enable. Do not leave floating. Abs. max 18 V - can be tied directly to VIN.
8	MODE/S-CONF	input	Mode selection and Smart-CONFIG pin. A resistor from this pin to GND selects combinations of switching frequency (1 MHz or 2.5 MHz), forced-PWM vs. auto-PFM power-save operation, output discharge on/off, and whether FB/VSET is used as external-divider FB or internal-divider VSET. See Table 8-1 for the resistor-to-configuration mapping.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOT-583-8
Category	Interface
Pins	8

Ordering variants

Same part, different packaging or reel option.

TPS629210QDRLRQ1
TPS629210QDRLRQ1DYCR

CAD (KiCad official)

Symbol: TPS629210QDRLRQ1
Footprint: Package_TO_SOT_SMD:SOT-583-8
3D model: SOT-583-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`tps629210qdrlrq1.step`	53 KB	You want the bare part, or you mark your own boards.
`tps629210qdrlrq1-etched.step`	1.5 MB	You want the part with `TPS629210QDRLRQ1` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 400 faces against 68 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (55 pp, sha256 cee1756729ab065e, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF